Searched full:mx8m (Results 1 – 21 of 21) sorted by relevance
19 Rockchip, NXP i.MX8M and STM32MP25 SoCs, which accelerate video33 bool "Hantro VPU i.MX8M support"38 Enable support for i.MX8M SoCs.
5 tristate "i.MX8M SoC family support"11 If you say yes here you get support for the NXP i.MX8M family
7 title: NXP i.MX8M Family Anatop Module13 NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
7 title: i.MX8M DDR Controller13 The DDRC block is integrated in i.MX8M for interfacing with DDR based
7 title: NXP i.MX8M Series SoC13 NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be
113 tristate "i.MX8M DDRC DEVFREQ Driver"118 This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
38 * i.MX8M DRAM Controller clocks have the following structure (abridged):455 MODULE_DESCRIPTION("i.MX8M DDR Controller frequency driver");
13 model = "emtrion SoM emCON-MX8M mini on Avari";
13 model = "Engicam i.Core MX8M Mini C.TOUCH 2.0";
13 model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
15 model = "Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit";
13 model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
13 model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
18 model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)";
13 model = "Data Modul i.MX8M Mini eDM SBC";
786 * The register address below maps to the MX8M
18 is found in the i.MX6UL/L, i.MX7 and i.MX8M[MQ] SoCs.
43 pin. Please refer to i.MX8M Mini/Nano/Plus/Quad Reference Manual for
666 * Unlike Exynos, PLL_P(PMS_P) offset 14 is used in i.MX8M Mini/Nano/Plus941 * The tech Applications Processor manuals for i.MX8M Mini, Nano, in samsung_dsim_set_phy_ctrl()1771 * The i.MX8M Mini/Nano glue logic between LCDIF and DSIM in samsung_dsim_atomic_check()1780 * The i.MX8M Plus glue logic between LCDIFv3 and DSIM does not in samsung_dsim_atomic_check()2202 /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ in samsung_dsim_probe()
3 * Driver for i.MX8M Plus Audio BLK_CTRL
50 * i.MX8M Mini, Nano and Plus have a third DISPLAY_BLK_CTRL register