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/linux/drivers/phy/marvell/
H A DMakefile7 obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o
8 obj-$(CONFIG_PHY_MVEBU_A3700_UTMI) += phy-mvebu-a3700-utmi.o
10 obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
11 obj-$(CONFIG_PHY_MVEBU_CP110_UTMI) += phy-mvebu-cp110-utmi.o
12 obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
H A Dphy-mvebu-sata.c3 * phy-mvebu-sata.c: SATA Phy driver for the Marvell mvebu SoCs.
117 { .compatible = "marvell,mvebu-sata-phy" },
124 .name = "phy-mvebu-sata",
/linux/arch/arm/mach-mvebu/
H A Dmvebu-soc-id.c3 * ID and revision information for mvebu SoCs
9 * All the mvebu SoCs have information related to their variant and
15 #define pr_fmt(fmt) "mvebu-soc-id: " fmt
26 #include "mvebu-soc-id.h"
106 pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev); in get_soc_id_by_pci()
140 pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev); in mvebu_soc_id_init()
153 /* Also protects against running on non-mvebu systems */ in mvebu_soc_device()
H A Dcoherency.c18 #define pr_fmt(fmt) "mvebu-coherency: " fmt
35 #include "mvebu-soc-id.h"
148 "arm/mvebu/coherency:starting", in armada_370_coherency_init()
H A Dkirkwood.c5 * arch/arm/mach-mvebu/kirkwood.c
160 "mvebu-audio", NULL),
/linux/Documentation/devicetree/bindings/phy/
H A Dmarvell,mvebu-sata-phy.yaml4 $id: http://devicetree.org/schemas/phy/marvell,mvebu-sata-phy.yaml#
7 title: Marvell MVEBU SATA PHY
15 const: marvell,mvebu-sata-phy
42 compatible = "marvell,mvebu-sata-phy";
H A Dmarvell,comphy-cp110.yaml7 title: Marvell MVEBU COMPHY Controller
13 COMPHY controllers can be found on the following Marvell MVEBU SoCs:
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt1 Device tree bindings for MVEBU Device Bus controllers
10 "marvell,mvebu-devbus" compatible string.
68 Mandatory for "marvell,mvebu-devbus" compatible string,
80 Mandatory for "marvell,mvebu-devbus" compatible string,
106 Mandatory for "marvell,mvebu-devbus" compatible string,
118 This address window handling is done in this mvebu-devbus only as a temporary
H A Dmarvell,mvebu-sdram-controller.yaml4 $id: http://devicetree.org/schemas/memory-controllers/marvell,mvebu-sdram-controller.yaml#
7 title: Marvell MVEBU SDRAM controller
/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dmvebu-cpu-config.txt1 MVEBU CPU Config registers
4 MVEBU (Marvell SOCs: Armada 370/XP)
H A Dmvebu-system-controller.txt1 MVEBU System Controller
3 MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x)
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h3 * Marvell MVEBU pinctrl driver
71 * register for common mpp pin configuration registers on MVEBU. SoC specific
108 * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
186 .name = "mvebu-gpio", \
H A Dpinctrl-armada-ap806.c3 * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
18 #include "pinctrl-mvebu.h"
H A Dpinctrl-mvebu.c3 * Marvell MVEBU pinctrl core driver
24 #include "pinctrl-mvebu.h"
608 /* count controls and create names for mvebu generic in mvebu_pinctrl_probe()
622 * as a range of one-pin groups with generic mvebu register in mvebu_pinctrl_probe()
671 * with generic mvebu register controls. Use one group for in mvebu_pinctrl_probe()
766 * assigning the MMIO base address to all mvebu mpp ctrl instances.
/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-xp.dtsi51 compatible = "marvell,mvebu-devbus";
61 compatible = "marvell,mvebu-devbus";
71 compatible = "marvell,mvebu-devbus";
81 compatible = "marvell,mvebu-devbus";
91 compatible = "marvell,mvebu-devbus";
H A Darmada-375.dtsi84 compatible = "marvell,mvebu-devbus";
94 compatible = "marvell,mvebu-devbus";
104 compatible = "marvell,mvebu-devbus";
114 compatible = "marvell,mvebu-devbus";
124 compatible = "marvell,mvebu-devbus";
534 coreclk: mvebu-sar@e8204 {
H A Darmada-38x.dtsi51 compatible = "marvell,mvebu-devbus";
61 compatible = "marvell,mvebu-devbus";
71 compatible = "marvell,mvebu-devbus";
81 compatible = "marvell,mvebu-devbus";
91 compatible = "marvell,mvebu-devbus";
395 coreclk: mvebu-sar@18600 {
H A Dorion5x-linkstation-lswtgl.dts49 #include "mvebu-linkstation-gpio-simple.dtsi"
50 #include "mvebu-linkstation-fan.dtsi"
H A Dorion5x-linkstation-lschl.dts50 #include "mvebu-linkstation-gpio-simple.dtsi"
51 #include "mvebu-linkstation-fan.dtsi"
/linux/drivers/irqchip/
H A DMakefile85 obj-$(CONFIG_MVEBU_GICP) += irq-mvebu-gicp.o
86 obj-$(CONFIG_MVEBU_ICU) += irq-mvebu-icu.o
87 obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
88 obj-$(CONFIG_MVEBU_PIC) += irq-mvebu-pic.o
89 obj-$(CONFIG_MVEBU_SEI) += irq-mvebu-sei.o
H A Dirq-mvebu-icu.c25 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
301 .name = "mvebu-icu-subset",
365 .name = "mvebu-icu",
/linux/drivers/pci/controller/
H A Dpci-mvebu.c261 * as read-only but this mvebu controller has it as read-write and must in mvebu_pcie_setup_hw()
279 * Note that this mvebu PCI Bridge does not have compliant Type 1 in mvebu_pcie_setup_hw()
286 * different things: they are aliased into internal mvebu registers in mvebu_pcie_setup_hw()
291 * access to configuration space via internal mvebu registers or in mvebu_pcie_setup_hw()
294 * also via standard mvebu way for accessing PCI config space. in mvebu_pcie_setup_hw()
587 * secondary bus number which is mvebu local bus number. in mvebu_pci_bridge_emul_base_conf_read()
923 * Older mvebu hardware provides PCIe Capability structure only in in mvebu_pci_bridge_emul_init()
934 * Set physical slot number to port+1 as mvebu ports are indexed from in mvebu_pci_bridge_emul_init()
936 * as Root Port which is not mvebu case. in mvebu_pci_bridge_emul_init()
1046 .name = "mvebu-INTx",
[all …]
/linux/include/linux/
H A Dmbus.h75 * On all ARM32 MVEBU platforms with MBus support, this stub in mvebu_mbus_get_io_win_info()
77 * MBus driver is called instead. ARM64 MVEBU platforms like in mvebu_mbus_get_io_win_info()
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9130-sr-som.dtsi50 * but pinctrl-mvebu does not support this.
52 * From pinctrl-mvebu.h:
/linux/drivers/memory/
H A Dmvebu-devbus.c156 if (of_device_is_compatible(devbus->dev->of_node, "marvell,mvebu-devbus")) { in devbus_get_timing_params()
324 { .compatible = "marvell,mvebu-devbus" },
333 .name = "mvebu-devbus",

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