xref: /linux/drivers/pinctrl/mvebu/pinctrl-armada-ap806.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
286fbd094SHanna Hawa /*
386fbd094SHanna Hawa  * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
486fbd094SHanna Hawa  *
586fbd094SHanna Hawa  * Copyright (C) 2017 Marvell
686fbd094SHanna Hawa  *
786fbd094SHanna Hawa  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
886fbd094SHanna Hawa  * Hanna Hawa <hannah@marvell.com>
986fbd094SHanna Hawa  */
1086fbd094SHanna Hawa 
1186fbd094SHanna Hawa #include <linux/err.h>
1286fbd094SHanna Hawa #include <linux/init.h>
1386fbd094SHanna Hawa #include <linux/io.h>
1486fbd094SHanna Hawa #include <linux/platform_device.h>
1586fbd094SHanna Hawa #include <linux/of.h>
1686fbd094SHanna Hawa #include <linux/pinctrl/pinctrl.h>
1786fbd094SHanna Hawa 
1886fbd094SHanna Hawa #include "pinctrl-mvebu.h"
1986fbd094SHanna Hawa 
2086fbd094SHanna Hawa static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
2186fbd094SHanna Hawa 	MPP_MODE(0,
2286fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
2386fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "clk"),
2486fbd094SHanna Hawa 		 MPP_FUNCTION(3, "spi0",    "clk")),
2586fbd094SHanna Hawa 	MPP_MODE(1,
2686fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
2786fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "cmd"),
2886fbd094SHanna Hawa 		 MPP_FUNCTION(3, "spi0",    "miso")),
2986fbd094SHanna Hawa 	MPP_MODE(2,
3086fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
3186fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d0"),
3286fbd094SHanna Hawa 		 MPP_FUNCTION(3, "spi0",    "mosi")),
3386fbd094SHanna Hawa 	MPP_MODE(3,
3486fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
3586fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d1"),
3686fbd094SHanna Hawa 		 MPP_FUNCTION(3, "spi0",    "cs0n")),
3786fbd094SHanna Hawa 	MPP_MODE(4,
3886fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
3986fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d2"),
4086fbd094SHanna Hawa 		 MPP_FUNCTION(3, "i2c0",    "sda")),
4186fbd094SHanna Hawa 	MPP_MODE(5,
4286fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
4386fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d3"),
4486fbd094SHanna Hawa 		 MPP_FUNCTION(3, "i2c0",    "sdk")),
4586fbd094SHanna Hawa 	MPP_MODE(6,
4686fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
4786fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "ds")),
4886fbd094SHanna Hawa 	MPP_MODE(7,
4986fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
5086fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d4"),
5186fbd094SHanna Hawa 		 MPP_FUNCTION(3, "uart1",   "rxd")),
5286fbd094SHanna Hawa 	MPP_MODE(8,
5386fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
5486fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d5"),
5586fbd094SHanna Hawa 		 MPP_FUNCTION(3, "uart1",   "txd")),
5686fbd094SHanna Hawa 	MPP_MODE(9,
5786fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
5886fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d6"),
5986fbd094SHanna Hawa 		 MPP_FUNCTION(3, "spi0",    "cs1n")),
6086fbd094SHanna Hawa 	MPP_MODE(10,
6186fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
6286fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "d7")),
6386fbd094SHanna Hawa 	MPP_MODE(11,
6486fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
6586fbd094SHanna Hawa 		 MPP_FUNCTION(3, "uart0",   "txd")),
6686fbd094SHanna Hawa 	MPP_MODE(12,
6786fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
6886fbd094SHanna Hawa 		 MPP_FUNCTION(1, "sdio",    "pw_off"),
6986fbd094SHanna Hawa 		 MPP_FUNCTION(2, "sdio",    "hw_rst")),
7086fbd094SHanna Hawa 	MPP_MODE(13,
7186fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
7286fbd094SHanna Hawa 	MPP_MODE(14,
7386fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
7486fbd094SHanna Hawa 	MPP_MODE(15,
7586fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
7686fbd094SHanna Hawa 	MPP_MODE(16,
7786fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
7886fbd094SHanna Hawa 	MPP_MODE(17,
7986fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
8086fbd094SHanna Hawa 	MPP_MODE(18,
8186fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL)),
8286fbd094SHanna Hawa 	MPP_MODE(19,
8386fbd094SHanna Hawa 		 MPP_FUNCTION(0, "gpio",    NULL),
8486fbd094SHanna Hawa 		 MPP_FUNCTION(3, "uart0",   "rxd"),
8586fbd094SHanna Hawa 		 MPP_FUNCTION(4, "sdio",    "pw_off")),
8686fbd094SHanna Hawa };
8786fbd094SHanna Hawa 
8886fbd094SHanna Hawa static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
8986fbd094SHanna Hawa 
9086fbd094SHanna Hawa static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
9186fbd094SHanna Hawa 	{
9286fbd094SHanna Hawa 		.compatible = "marvell,ap806-pinctrl",
9386fbd094SHanna Hawa 	},
9486fbd094SHanna Hawa 	{ },
9586fbd094SHanna Hawa };
9686fbd094SHanna Hawa 
9786fbd094SHanna Hawa static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
9886fbd094SHanna Hawa 	MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
9986fbd094SHanna Hawa };
10086fbd094SHanna Hawa 
10186fbd094SHanna Hawa static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
10286fbd094SHanna Hawa 	MPP_GPIO_RANGE(0,   0,  0, 20),
10386fbd094SHanna Hawa };
10486fbd094SHanna Hawa 
armada_ap806_pinctrl_probe(struct platform_device * pdev)10586fbd094SHanna Hawa static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
10686fbd094SHanna Hawa {
10786fbd094SHanna Hawa 	struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
10886fbd094SHanna Hawa 
109*63bffc2dSRob Herring 	if (!pdev->dev.parent)
11086fbd094SHanna Hawa 		return -ENODEV;
11186fbd094SHanna Hawa 
11286fbd094SHanna Hawa 	soc->variant = 0; /* no variants for Armada AP806 */
11386fbd094SHanna Hawa 	soc->controls = armada_ap806_mpp_controls;
11486fbd094SHanna Hawa 	soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
11586fbd094SHanna Hawa 	soc->gpioranges = armada_ap806_mpp_gpio_ranges;
11686fbd094SHanna Hawa 	soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
11786fbd094SHanna Hawa 	soc->modes = armada_ap806_mpp_modes;
11886fbd094SHanna Hawa 	soc->nmodes = armada_ap806_mpp_controls[0].npins;
11986fbd094SHanna Hawa 
12086fbd094SHanna Hawa 	pdev->dev.platform_data = soc;
12186fbd094SHanna Hawa 
12286fbd094SHanna Hawa 	return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
12386fbd094SHanna Hawa }
12486fbd094SHanna Hawa 
12586fbd094SHanna Hawa static struct platform_driver armada_ap806_pinctrl_driver = {
12686fbd094SHanna Hawa 	.driver = {
12786fbd094SHanna Hawa 		.name = "armada-ap806-pinctrl",
12886fbd094SHanna Hawa 		.of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
12986fbd094SHanna Hawa 	},
13086fbd094SHanna Hawa 	.probe = armada_ap806_pinctrl_probe,
13186fbd094SHanna Hawa };
13286fbd094SHanna Hawa 
13386fbd094SHanna Hawa builtin_platform_driver(armada_ap806_pinctrl_driver);
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