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/linux/arch/mips/include/asm/
H A Dmsa.h25 * read_msa_wr() - Read a single MSA vector register
30 * Read the value of MSA vector register idx into the FPU register
64 * write_msa_wr() - Write a single MSA vector register
69 * Write the value from the FPU register union from into MSA vector
125 * compiler to optimise out code for CPUs without MSA without adding in thread_msa_context_live()
126 * an extra redundant check for CPUs with MSA. in thread_msa_context_live()
150 * compiler to optimise out code for CPUs without MSA without adding in init_msa_upper()
151 * an extra redundant check for CPUs with MSA. in init_msa_upper()
162 * to allow compilation with toolchains that do not support MSA. Once all
163 * toolchains in use support MSA these can be removed.
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H A Dasmmacro.h13 #include <asm/msa.h>
253 .set msa
262 .set msa
271 .set msa
280 .set msa
289 .set msa
298 .set msa
307 .set msa
316 .set msa
325 .set msa
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H A Dthread_info.h130 #define TIF_USEDMSA 29 /* MSA has been used this quantum */
131 #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
/linux/arch/mips/include/uapi/asm/
H A Ducontext.h26 * struct msa_extcontext - MSA extended context structure
28 * @wr: the most significant 64 bits of each MSA vector register
29 * @csr: the value of the MSA control & status register
31 * If MSA context is live for a task at the time a signal is delivered to it,
32 * this structure will hold the MSA context of the task as it was prior to the
H A Dkvm.h69 * Register set = 3: FPU / MSA registers (see definitions below).
168 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
193 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
/linux/arch/mips/kernel/
H A Dsignal.c40 #include <asm/msa.h>
165 struct msa_extcontext __user *msa = buf; in save_msa_extcontext() local
173 * Ensure that we can't lose the live MSA context between checking in save_msa_extcontext()
181 * instructions, so MSA context has to be saved to kernel memory in save_msa_extcontext()
188 err = __put_user(read_msa_csr(), &msa->csr); in save_msa_extcontext()
189 err |= _save_msa_all_upper(&msa->wr); in save_msa_extcontext()
195 err = __put_user(current->thread.fpu.msacsr, &msa->csr); in save_msa_extcontext()
199 err |= __put_user(val, &msa->wr[i]); in save_msa_extcontext()
203 err |= __put_user(MSA_EXTCONTEXT_MAGIC, &msa->ext.magic); in save_msa_extcontext()
204 err |= __put_user(sizeof(*msa), &msa->ext.size); in save_msa_extcontext()
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H A Dtraps.c59 #include <asm/msa.h>
1275 static int enable_restore_fp_context(int msa) in enable_restore_fp_context() argument
1286 if (msa && !err) { in enable_restore_fp_context()
1289 * with MSA enabled, userspace can see MSACSR in enable_restore_fp_context()
1290 * and MSA regs, but the values in them are from in enable_restore_fp_context()
1292 * from saved fp/msa context in enable_restore_fp_context()
1310 * If this thread has no live MSA vector context then we can simply in enable_restore_fp_context()
1311 * restore the scalar FP context. If it has live MSA vector context in enable_restore_fp_context()
1312 * (that is, it has or may have used MSA since last performing a in enable_restore_fp_context()
1315 * instruction. This is because if we were to later execute an MSA in enable_restore_fp_context()
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/linux/drivers/net/wireless/ath/ath10k/
H A Dqmi.c59 ath10k_err(ar, "failed to assign msa map permissions: %d\n", ret); in ath10k_qmi_map_msa_permission()
83 ath10k_err(ar, "failed to unmap msa permissions: %d\n", ret); in ath10k_qmi_unmap_msa_permission()
131 req.msa_addr = ar->msa.paddr; in ath10k_qmi_msa_mem_info_send_sync_msg()
132 req.size = ar->msa.mem_size; in ath10k_qmi_msa_mem_info_send_sync_msg()
145 ath10k_err(ar, "failed to send msa mem info req: %d\n", ret); in ath10k_qmi_msa_mem_info_send_sync_msg()
154 ath10k_err(ar, "msa info req rejected: %d\n", resp.resp.error); in ath10k_qmi_msa_mem_info_send_sync_msg()
166 max_mapped_addr = ar->msa.paddr + ar->msa.mem_size; in ath10k_qmi_msa_mem_info_send_sync_msg()
169 if (resp.mem_region_info[i].size > ar->msa.mem_size || in ath10k_qmi_msa_mem_info_send_sync_msg()
171 resp.mem_region_info[i].region_addr < ar->msa.paddr || in ath10k_qmi_msa_mem_info_send_sync_msg()
184 "qmi msa mem region %d addr 0x%pa size 0x%x flag 0x%08x\n", in ath10k_qmi_msa_mem_info_send_sync_msg()
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/linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c220 /* Double buffer enable for MSA and pixel format registers in dcn31_hpo_dp_stream_enc_set_stream_attribute()
365 /* MSA Packet Mapping to 32-bit Link Symbols - DP2 spec, section 2.7.4.1 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
368 * MSA[0] = { 0, 0, 0, VFREQ[47:40]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
369 * MSA[1] = { 0, 0, 0, VFREQ[39:32]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
370 * MSA[2] = { 0, 0, 0, VFREQ[31:24]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
371 * MSA[3] = { HTotal[15:8], HStart[15:8], HWidth[15:8], VFREQ[23:16]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
372 * MSA[4] = { HTotal[ 7:0], HStart[ 7:0], HWidth[ 7:0], VFREQ[15: 8]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
373 * MSA[5] = { VTotal[15:8], VStart[15:8], VHeight[15:8], VFREQ[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
374 * MSA[6] = { VTotal[ 7:0], VStart[ 7:0], VHeight[ 7:0], MISC0[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
375 * MSA[7] = { HSP|HSW[14:8], VSP|VSW[14:8], 0, MISC1[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
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/linux/arch/csky/abiv2/inc/abi/
H A Dentry.h290 * MMU on: use origin MSA value from bootloader
292 * cr<30/31, 15> MSA register format:
296 mfcr r6, MSA_SET /* Get MSA */
301 mtcr r6, MSA_SET /* Set MSA */
304 mtcr r6, MSA_CLR /* Clr MSA */
/linux/arch/mips/kvm/
H A Dmips.c705 /* MIPS SIMD Architecture (MSA) registers */ in kvm_mips_get_reg()
709 /* Can't access MSA registers in FR=0 mode */ in kvm_mips_get_reg()
839 /* MIPS SIMD Architecture (MSA) registers */ in kvm_mips_set_reg()
1058 * We don't support MSA vector partitioning yet: in kvm_vm_ioctl_check_extension()
1339 * If FPU / MSA are enabled (i.e. the guest's FPU / MSA context in __kvm_mips_handle_exit()
1343 * vector, as it may well cause an [MSA] FP exception if there in __kvm_mips_handle_exit()
1380 * If MSA state is already live, it is undefined how it interacts with in kvm_own_fpu()
1382 * exceptions trying to save the MSA state later when CU=1 && FR=1, so in kvm_own_fpu()
1413 /* Enable MSA for guest and restore context */
1430 * interacts with MSA state, so play it safe and save it first. in kvm_own_msa()
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H A Dtrace.h100 { KVM_TRACE_EXIT_MSA_FPE, "MSA FPE" }, \
102 { KVM_TRACE_EXIT_MSA_DISABLED, "MSA Disabled" }, \
249 { KVM_TRACE_AUX_MSA, "MSA" }, \
250 { KVM_TRACE_AUX_FPU_MSA, "FPU & MSA" }
H A Dmsa.S6 * MIPS SIMD Architecture (MSA) context handling code for KVM.
155 * which triggers an MSA FP Exception, which must be stepped over and
H A DMakefile9 kvm-$(CONFIG_CPU_HAS_MSA) += msa.o
/linux/drivers/scsi/device_handler/
H A DKconfig22 tristate "HP/COMPAQ MSA Device Handler"
25 If you have a HP/COMPAQ MSA device that requires START_STOP to
/linux/drivers/char/mwave/
H A D3780i.c488 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_ReadDStore()
530 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_ReadAndClearDStore()
571 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_WriteDStore()
612 * Set the initial MSA address. To convert from an instruction store in dsp3780I_ReadIStore()
613 * address to an MSA address in dsp3780I_ReadIStore()
661 * Set the initial MSA address. To convert from an instruction store in dsp3780I_WriteIStore()
662 * address to an MSA address in dsp3780I_WriteIStore()
H A D3780i.h62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
64 #define DSP_ReadAndClear 0x000C /* MSA read and clear data register */
151 /* DSP registers that exist in MSA I/O space */
/linux/tools/arch/s390/include/uapi/asm/
H A Dkvm.h457 __u8 kmac[16]; /* with MSA */
458 __u8 kmc[16]; /* with MSA */
459 __u8 km[16]; /* with MSA */
460 __u8 kimd[16]; /* with MSA */
461 __u8 klmd[16]; /* with MSA */
/linux/tools/arch/mips/include/uapi/asm/
H A Dkvm.h62 * Register set = 3: FPU / MSA registers (see definitions below).
152 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
177 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
/linux/Documentation/devicetree/bindings/net/wireless/
H A Dqcom,ath10k.yaml41 Reference to the MSA memory region used by the Wi-Fi firmware
125 qcom,msa-fixed-perm:
131 qcom,no-msa-ready-indicator:
/linux/arch/s390/include/asm/
H A Dcpacf.h20 #define CPACF_KMAC 0xb91e /* MSA */
21 #define CPACF_KM 0xb92e /* MSA */
22 #define CPACF_KMC 0xb92f /* MSA */
23 #define CPACF_KIMD 0xb93e /* MSA */
24 #define CPACF_KLMD 0xb93f /* MSA */
310 return test_facility(17); /* check for MSA */ in __cpacf_check_opcode()
/linux/arch/s390/crypto/
H A Dsha3_256_s390.c24 if (!test_facility(86)) /* msa 12 */ in sha3_256_init()
96 if (!test_facility(86)) /* msa 12 */ in sha3_224_init()
H A Dsha3_512_s390.c23 if (!test_facility(86)) /* msa 12 */ in sha3_512_init()
105 if (!test_facility(86)) /* msa 12 */ in sha3_384_init()
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7180-mss-pil.yaml33 - description: MSA Stream 1
34 - description: MSA Stream 2
H A Dqcom,sc7280-mss-pil.yaml33 - description: MSA Stream 1
34 - description: MSA Stream 2

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