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/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaLoongArch.cpp1 //===------ SemaLoongArch.cpp ---- LoongArch target-specific routines -----===//
9 // This file implements semantic analysis functions specific to LoongArch.
29 case LoongArch::BI__builtin_loongarch_cacop_d: in CheckLoongArchBuiltinFunctionCall()
30 case LoongArch::BI__builtin_loongarch_cacop_w: { in CheckLoongArchBuiltinFunctionCall()
36 case LoongArch::BI__builtin_loongarch_break: in CheckLoongArchBuiltinFunctionCall()
37 case LoongArch::BI__builtin_loongarch_dbar: in CheckLoongArchBuiltinFunctionCall()
38 case LoongArch::BI__builtin_loongarch_ibar: in CheckLoongArchBuiltinFunctionCall()
39 case LoongArch::BI__builtin_loongarch_syscall: in CheckLoongArchBuiltinFunctionCall()
42 case LoongArch::BI__builtin_loongarch_csrrd_w: in CheckLoongArchBuiltinFunctionCall()
43 case LoongArch::BI__builtin_loongarch_csrrd_d: in CheckLoongArchBuiltinFunctionCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchOptWInstrs.cpp32 #include "LoongArch.h"
42 #define DEBUG_TYPE "loongarch-opt-w-instrs"
43 #define LOONGARCH_OPT_W_INSTRS_NAME "LoongArch Optimize W Instructions"
50 DisableSExtWRemoval("loongarch-disable-sextw-removal",
54 DisableCvtToDSuffix("loongarch-disable-cvt-to-d-suffix",
132 case LoongArch::ADD_W: in hasAllNBitUsers()
133 case LoongArch::ADDI_W: in hasAllNBitUsers()
134 case LoongArch::SUB_W: in hasAllNBitUsers()
135 case LoongArch::ALSL_W: in hasAllNBitUsers()
136 case LoongArch::ALSL_WU: in hasAllNBitUsers()
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H A DLoongArchInstrInfo.cpp1 //=- LoongArchInstrInfo.cpp - LoongArch Instruction Information -*- C++ -*-===//
9 // This file contains the LoongArch implementation of the TargetInstrInfo class.
14 #include "LoongArch.h"
28 : LoongArchGenInstrInfo(LoongArch::ADJCALLSTACKDOWN, in LoongArchInstrInfo()
29 LoongArch::ADJCALLSTACKUP), in LoongArchInstrInfo()
33 return MCInstBuilder(LoongArch::ANDI) in getNop()
34 .addReg(LoongArch::R0) in getNop()
35 .addReg(LoongArch::R0) in getNop()
43 if (LoongArch::GPRRegClass.contains(DstReg, SrcReg)) { in copyPhysReg()
44 BuildMI(MBB, MBBI, DL, get(LoongArch::OR), DstReg) in copyPhysReg()
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H A DLoongArchExpandPseudoInsts.cpp14 #include "LoongArch.h"
31 "LoongArch Pre-RA pseudo instruction expansion pass"
33 "LoongArch pseudo instruction expansion pass"
116 case LoongArch::PseudoLA_PCREL: in expandMI()
118 case LoongArch::PseudoLA_GOT: in expandMI()
120 case LoongArch::PseudoLA_TLS_LE: in expandMI()
122 case LoongArch::PseudoLA_TLS_IE: in expandMI()
124 case LoongArch::PseudoLA_TLS_LD: in expandMI()
126 case LoongArch::PseudoLA_TLS_GD: in expandMI()
128 case LoongArch::PseudoLA_TLS_DESC_PC: in expandMI()
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H A DLoongArchExpandAtomicPseudoInsts.cpp16 #include "LoongArch.h"
27 "LoongArch atomic pseudo instruction expansion pass"
91 case LoongArch::PseudoMaskedAtomicSwap32: in expandMI()
94 case LoongArch::PseudoAtomicSwap32: in expandMI()
97 case LoongArch::PseudoMaskedAtomicLoadAdd32: in expandMI()
99 case LoongArch::PseudoMaskedAtomicLoadSub32: in expandMI()
101 case LoongArch::PseudoAtomicLoadNand32: in expandMI()
104 case LoongArch::PseudoAtomicLoadNand64: in expandMI()
107 case LoongArch::PseudoMaskedAtomicLoadNand32: in expandMI()
110 case LoongArch in expandMI()
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H A DLoongArchRegisterInfo.cpp1 //===- LoongArchRegisterInfo.cpp - LoongArch Register Information -*- C++ -*-=//
9 // This file contains the LoongArch implementation of the TargetRegisterInfo
15 #include "LoongArch.h"
34 : LoongArchGenRegisterInfo(LoongArch::R1, /*DwarfFlavour*/ 0, in LoongArchRegisterInfo()
91 markSuperRegs(Reserved, LoongArch::R0); // zero in getReservedRegs()
92 markSuperRegs(Reserved, LoongArch::R2); // tp in getReservedRegs()
93 markSuperRegs(Reserved, LoongArch::R3); // sp in getReservedRegs()
94 markSuperRegs(Reserved, LoongArch::R21); // non-allocatable in getReservedRegs()
96 markSuperRegs(Reserved, LoongArch::R22); // fp in getReservedRegs()
109 return TFI->hasFP(MF) ? LoongArch in getFrameRegister()
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H A DLoongArchISelDAGToDAG.cpp1 //=- LoongArchISelDAGToDAG.cpp - A dag to dag inst selector for LoongArch -===//
9 // This file defines an instruction selector for the LoongArch target.
22 #define DEBUG_TYPE "loongarch-isel"
23 #define PASS_NAME "LoongArch DAG->DAG Pattern Instruction Selection"
56 LoongArch::R0, GRLenVT); in INITIALIZE_PASS()
61 SDValue SrcReg = CurDAG->getRegister(LoongArch::R0, GRLenVT); in INITIALIZE_PASS()
65 if (Inst.Opc == LoongArch::LU12I_W) in INITIALIZE_PASS()
66 Result = CurDAG->getMachineNode(LoongArch::LU12I_W, DL, GRLenVT, SDImm); in INITIALIZE_PASS()
80 Subtarget->is64Bit() ? LoongArch::ADDI_D : LoongArch::ADDI_W; in INITIALIZE_PASS()
114 Op = Is256Vec ? LoongArch::PseudoXVREPLI_B : LoongArch::PseudoVREPLI_B; in INITIALIZE_PASS()
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H A DLoongArchFrameLowering.cpp1 //===-- LoongArchFrameLowering.cpp - LoongArch Frame Information -*- C++ -*-==//
9 // This file contains the LoongArch implementation of TargetFrameLowering class.
28 #define DEBUG_TYPE "loongarch-frame-lowering"
57 unsigned Addi = IsLA64 ? LoongArch::ADDI_D : LoongArch::ADDI_W; in adjustReg()
93 unsigned Opc = IsLA64 ? LoongArch::ADD_D : LoongArch::ADD_W; in adjustReg()
96 Opc = IsLA64 ? LoongArch::SUB_D : LoongArch::SUB_W; in adjustReg()
100 Register ScratchReg = MRI.createVirtualRegister(&LoongArch::GPRRegClass); in adjustReg()
136 if (MI.getOpcode() == LoongArch::PseudoST_CFR) in needScavSlotForCFR()
144 const TargetRegisterClass &RC = LoongArch::GPRRegClass; in processFunctionBeforeFrameFinalized()
189 Register SPReg = LoongArch::R3; in emitPrologue()
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H A DLoongArchISelLowering.cpp1 //=- LoongArchISelLowering.cpp - LoongArch DAG Lowering Implementation ---===//
9 // This file defines the interfaces that LoongArch uses to lower LLVM code into
15 #include "LoongArch.h"
37 #define DEBUG_TYPE "loongarch-isel-lowering"
41 static cl::opt<bool> ZeroDivCheck("loongarch-check-zero-division", cl::Hidden,
53 addRegisterClass(GRLenVT, &LoongArch::GPRRegClass); in LoongArchTargetLowering()
55 addRegisterClass(MVT::f32, &LoongArch::FPR32RegClass); in LoongArchTargetLowering()
57 addRegisterClass(MVT::f64, &LoongArch::FPR64RegClass); in LoongArchTargetLowering()
66 addRegisterClass(VT, &LoongArch::LSX128RegClass); in LoongArchTargetLowering()
70 addRegisterClass(VT, &LoongArch::LASX256RegClass); in LoongArchTargetLowering()
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H A DLoongArchAsmPrinter.cpp1 //===- LoongArchAsmPrinter.cpp - LoongArch LLVM Assembly Printer -*- C++ -*--=//
10 // of machine-dependent LLVM code to GAS-format LoongArch assembly language.
15 #include "LoongArch.h"
26 #define DEBUG_TYPE "loongarch-asm-printer"
74 OS << '$' << LoongArchInstPrinter::getRegisterName(LoongArch::R0); in PrintAsmOperand()
79 if (MO.getReg().id() >= LoongArch::VR0 && in PrintAsmOperand()
80 MO.getReg().id() <= LoongArch::VR31) in PrintAsmOperand()
86 if (MO.getReg().id() >= LoongArch::XR0 && in PrintAsmOperand()
87 MO.getReg().id() <= LoongArch::XR31) in PrintAsmOperand()
183 MCInstBuilder(LoongArch::B) in emitSled()
H A DLoongArchRegisterInfo.td1 //===-- LoongArchRegisterInfo.td - LoongArch Register defs -*- tablegen -*-===//
10 // Declarations that describe the LoongArch register files
13 let Namespace = "LoongArch" in {
54 } // Namespace = "LoongArch"
102 def GPR : RegisterClass<"LoongArch", [GRLenVT], 32, (add
120 def GPRT : RegisterClass<"LoongArch", [GRLenVT], 32, (add
170 def FPR32 : RegisterClass<"LoongArch", [f32], 32, (sequence "F%u", 0, 31)>;
171 def FPR64 : RegisterClass<"LoongArch", [f64], 64, (sequence "F%u_64", 0, 31)>;
178 def CFR : RegisterClass<"LoongArch", [GRLenVT], 32, (sequence "FCC%u", 0, 7)> {
188 def FCSR : RegisterClass<"LoongArch", [i32], 32, (sequence "FCSR%u", 0, 3)>;
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H A DLoongArchTargetTransformInfo.cpp1 //===-- LoongArchTargetTransformInfo.cpp - LoongArch specific TTI ---------===//
10 /// LoongArch target machine. It uses the target's detailed information to
77 return "LoongArch::GPRRC"; in getRegisterClassName()
79 return "LoongArch::FPRRC"; in getRegisterClassName()
81 return "LoongArch::VRRC"; in getRegisterClassName()
86 // TODO: Implement more hooks to provide TTI machinery for LoongArch.
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMCCodeEmitter.cpp1 //=- LoongArchMCCodeEmitter.cpp - Convert LoongArch code to machine code --===//
129 bool EnableRelax = STI.hasFeature(LoongArch::FeatureRelax); in getExprOpValue()
132 LoongArch::Fixups FixupKind = LoongArch::fixup_loongarch_invalid; in getExprOpValue()
145 FixupKind = LoongArch::fixup_loongarch_b16; in getExprOpValue()
148 FixupKind = LoongArch::fixup_loongarch_b21; in getExprOpValue()
153 FixupKind = LoongArch::fixup_loongarch_b26; in getExprOpValue()
156 FixupKind = LoongArch::fixup_loongarch_abs_hi20; in getExprOpValue()
159 FixupKind = LoongArch::fixup_loongarch_abs_lo12; in getExprOpValue()
162 FixupKind = LoongArch::fixup_loongarch_abs64_lo20; in getExprOpValue()
165 FixupKind = LoongArch::fixup_loongarch_abs64_hi12; in getExprOpValue()
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H A DLoongArchMCTargetDesc.cpp1 //===-- LoongArchMCTargetDesc.cpp - LoongArch Target Descriptions ---------===//
9 // This file provides LoongArch specific target descriptions.
45 InitLoongArchMCRegisterInfo(X, LoongArch::R1); in createLoongArchMCRegisterInfo()
68 MCRegister SP = MRI.getDwarfRegNum(LoongArch::R3, true); in createLoongArchMCAsmInfo()
101 Inst.getOpcode() == LoongArch::BL) { in evaluateBranch()
116 case LoongArch::JIRL: in isTerminator()
117 return Inst.getOperand(0).getReg() == LoongArch::R0; in isTerminator()
128 case LoongArch::JIRL: in isCall()
129 return Inst.getOperand(0).getReg() != LoongArch::R0; in isCall()
140 case LoongArch::JIRL: in isReturn()
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H A DLoongArchELFObjectWriter.cpp1 //===-- LoongArchELFObjectWriter.cpp - LoongArch ELF Writer ---*- C++ -*---===//
71 case LoongArch::fixup_loongarch_b16: in getRelocType()
73 case LoongArch::fixup_loongarch_b21: in getRelocType()
75 case LoongArch::fixup_loongarch_b26: in getRelocType()
77 case LoongArch::fixup_loongarch_abs_hi20: in getRelocType()
79 case LoongArch::fixup_loongarch_abs_lo12: in getRelocType()
81 case LoongArch::fixup_loongarch_abs64_lo20: in getRelocType()
83 case LoongArch::fixup_loongarch_abs64_hi12: in getRelocType()
85 case LoongArch::fixup_loongarch_tls_le_hi20: in getRelocType()
87 case LoongArch in getRelocType()
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H A DLoongArchAsmBackend.cpp1 //===-- LoongArchAsmBackend.cpp - LoongArch Assembler Backend -*- C++ -*---===//
26 #define DEBUG_TYPE "loongarch-asmbackend"
35 #include "llvm/BinaryFormat/ELFRelocs/LoongArch.def" in getFixupKind()
68 static_assert((std::size(Infos)) == LoongArch::NumTargetFixupKinds, in getFixupKindInfo()
100 case LoongArch::fixup_loongarch_b16: { in adjustFixupValue()
107 case LoongArch::fixup_loongarch_b21: { in adjustFixupValue()
114 case LoongArch::fixup_loongarch_b26: { in adjustFixupValue()
121 case LoongArch::fixup_loongarch_abs_hi20: in adjustFixupValue()
122 case LoongArch::fixup_loongarch_tls_le_hi20: in adjustFixupValue()
124 case LoongArch::fixup_loongarch_abs_lo12: in adjustFixupValue()
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H A DLoongArchMatInt.cpp30 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq()
35 Insts.push_back(Inst(LoongArch::ORI, Lo12)); in generateInstSeq()
37 Insts.push_back(Inst(LoongArch::ADDI_W, SignExtend64<12>(Lo12))); in generateInstSeq()
39 Insts.push_back(Inst(LoongArch::LU12I_W, SignExtend64<20>(Hi20))); in generateInstSeq()
41 Insts.push_back(Inst(LoongArch::ORI, Lo12)); in generateInstSeq()
45 Insts.push_back(Inst(LoongArch::LU32I_D, SignExtend64<20>(Higher20))); in generateInstSeq()
48 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq()
H A DLoongArchBaseInfo.cpp1 //= LoongArchBaseInfo.cpp - Top level definitions for LoongArch MC -*- C++ -*-//
9 // This file implements helper functions for the LoongArch target useful for the
85 return !Is64Bit && FeatureBits[LoongArch::FeatureBasicF]; in computeTargetABI()
87 return !Is64Bit && FeatureBits[LoongArch::FeatureBasicD]; in computeTargetABI()
91 return Is64Bit && FeatureBits[LoongArch::FeatureBasicF]; in computeTargetABI()
93 return Is64Bit && FeatureBits[LoongArch::FeatureBasicD]; in computeTargetABI()
161 if (FeatureBits[LoongArch::FeatureBasicD]) in computeTargetABI()
163 if (FeatureBits[LoongArch::FeatureBasicF]) in computeTargetABI()
191 MCRegister getBPReg() { return LoongArch::R31; } in getBPReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp1 // LoongArchAsmParser.cpp - Parse LoongArch assembly to MCInst instructions -=//
29 #define DEBUG_TYPE "loongarch-asm-parser"
34 bool is64Bit() const { return getSTI().hasFeature(LoongArch::Feature64Bit); } in is64Bit()
164 // Instances of this class represent a parsed LoongArch machine instruction.
197 LoongArchMCRegisterClasses[LoongArch::GPRRegClassID].contains( in isGPR()
606 assert(Reg >= LoongArch::F0 && Reg <= LoongArch::F31 && "Invalid register"); in convertFPR32ToFPR64()
607 return Reg - LoongArch::F0 + LoongArch::F0_64; in convertFPR32ToFPR64()
617 assert(!(RegNo >= LoongArch::F0_64 && RegNo <= LoongArch::F31_64)); in matchRegisterNameHelper()
619 static_assert(LoongArch::F0 < LoongArch::F0_64, in matchRegisterNameHelper()
621 if (RegNo == LoongArch::NoRegister) in matchRegisterNameHelper()
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DLoongArchTargetParser.cpp1 //===-- LoongArchTargetParser - Parser for LoongArch features --*- C++ -*-====//
9 // This file implements a target parser to recognise LoongArch hardware features
17 using namespace llvm::LoongArch;
26 {NAME, LoongArch::ArchKind::KIND, FEATURES},
30 bool LoongArch::isValidArchName(StringRef Arch) { in isValidArchName()
37 bool LoongArch::getArchFeatures(StringRef Arch, in getArchFeatures()
61 bool LoongArch::isValidCPUName(StringRef Name) { return isValidArchName(Name); } in isValidCPUName()
63 void LoongArch::fillValidCPUList(SmallVectorImpl<StringRef> &Values) { in fillValidCPUList()
68 StringRef LoongArch::getDefaultArch(bool Is64Bit) { in getDefaultArch()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp1 //===-- LoongArchDisassembler.cpp - Disassembler for LoongArch ------------===//
28 #define DEBUG_TYPE "loongarch-disassembler"
63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass()
72 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass()
81 Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo)); in DecodeFPR64RegisterClass()
90 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass()
99 Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo)); in DecodeFCSRRegisterClass()
108 Inst.addOperand(MCOperand::createReg(LoongArch::VR0 + RegNo)); in DecodeLSX128RegisterClass()
117 Inst.addOperand(MCOperand::createReg(LoongArch::XR0 + RegNo)); in DecodeLASX256RegisterClass()
126 Inst.addOperand(MCOperand::createReg(LoongArch::SCR0 + RegNo)); in DecodeSCRRegisterClass()
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/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DELF_loongarch.cpp1 //===--- ELF_loongarch.cpp - JIT linker implementation for ELF/loongarch --===//
9 // ELF/loongarch jit-link implementation.
17 #include "llvm/ExecutionEngine/JITLink/loongarch.h"
29 using namespace llvm::jitlink::loongarch;
44 return loongarch::applyFixup(G, B, E); in applyFixup()
51 static Expected<loongarch::EdgeKind_loongarch>
53 using namespace loongarch; in getRelocationKind()
74 "Unsupported loongarch relocation:" + formatv("{0:d}: ", Type) + in getRelocationKind()
111 Expected<loongarch::EdgeKind_loongarch> Kind = getRelocationKind(Type); in addSingleRelocation()
121 printEdge(dbgs(), BlockToFix, GE, loongarch in addSingleRelocation()
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H A Dloongarch.cpp1 //===--- loongarch.cpp - Generic JITLink loongarch edge kinds, utilities --===//
9 // Generic utilities for graphs representing loongarch objects.
13 #include "llvm/ExecutionEngine/JITLink/loongarch.h"
19 namespace loongarch { namespace
58 } // namespace loongarch
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/TargetInfo/
H A DLoongArchTargetInfo.cpp1 //===-- LoongArchTargetInfo.cpp - LoongArch Target Implementation ---------===//
25 getTheLoongArch32Target(), "loongarch32", "32-bit LoongArch", in LLVMInitializeLoongArchTargetInfo()
26 "LoongArch"); in LLVMInitializeLoongArchTargetInfo()
28 getTheLoongArch64Target(), "loongarch64", "64-bit LoongArch", in LLVMInitializeLoongArchTargetInfo()
29 "LoongArch"); in LLVMInitializeLoongArchTargetInfo()
/freebsd/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ELFRelocs/
H A DLoongArch.def5 // These types and values are from the LoongArch ELF psABI which can be found at
6 // https://github.com/loongson/LoongArch-Documentation
7 // and these definitions has been adopted by binutils (include/elf/loongarch.h).
66 // Spec addition: https://github.com/loongson/LoongArch-Documentation/pull/57
107 // Relocs added in ELF for the LoongArch™ Architecture v20230519, part of the
108 // v2.10 LoongArch ABI specs.
124 // Relocs added in ELF for the LoongArch™ Architecture v20231102, part of the
125 // v2.20 LoongArch ABI specs.
130 // Relocs added in ELF for the LoongArch™ Architecture v20231219, part of the
131 // v2.30 LoongArch AB
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