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/freebsd/contrib/libucl/tests/basic/
H A Dload.in1 # Load macro tests
4 .load(try=false, multiline=false, trim=false, escape=false, key="key1", target="string", priority=1…
5 .load(try=false, multiline=true, trim=false, escape=false, key="key2", target="string", priority=1)…
6 .load(try=false, multiline=true, trim=true, escape=false, key="key3", target="string", priority=1) …
7 .load(try=false, multiline=true, trim=true, escape=true, key="key4", target="string", priority=1) "…
8 .load(try=false, multiline=false, trim=true, escape=false, key="key5", target="string", priority=1)…
9 .load(try=false, multiline=false, trim=false, escape=true, key="key6", target="string", priority=1)…
10 .load(try=false, multiline=false, trim=true, escape=true, key="key7", target="string", priority=1) …
11 .load(try=false, multiline=false, trim=false, escape=false, key="key8", target="int", priority=1) "…
12 .load(try=false, multiline=false, trim=false, escape=false, key="key9", target="int", priority=4) "…
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DLSUnit.h10 /// A Load/Store unit class that models load/store queues and that implements
189 /// Abstract base interface for LS (load/store) units in llvm-mca.
191 /// Load queue size.
193 /// A value of zero for this field means that the load queue is unbounded.
194 /// Processor models can declare the size of a load queue via tablegen (see
199 /// Load queue size.
227 /// Returns the total number of entries in the load queue.
244 LSU_LQUEUE_FULL, // Load Queue unavailable
248 /// This method checks the availability of the load/store buffers.
250 /// Returns LSU_AVAILABLE if there are enough load/store queue entries to
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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A Dmemory.json5 …p (prediction=correct) for all data types excluding data prefetch (demand load,inst prefetch,inst …
6 …this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,…
11 …fDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for a demand load",
12 …Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load"
17 … was reloaded from another chip's memory on the same Node or Group (Distant) due to a demand load",
23 …tion": "The processor's data cache was reloaded from the local chip's Memory due to a demand load",
29 …as reloaded from a memory location including L4 from local remote or distant due to a demand load",
35 …ache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a demand load",
41 … was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load",
47 …Description": "Initial and Final Pump Scope was group pump (prediction=correct) for a demand load",
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H A Dmarked.json35 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
41 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
47 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
53 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
59 …e was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load",
65 …cles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load",
71 … was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load",
77 …les to reload from another chip's memory on the same Node or Group (Distant) due to a marked load",
83 …fDescription": "The processor's data cache was reloaded from local core's L2 due to a marked load",
95 …Duration in cycles to reload from a localtion other than the local core's L2 due to a marked load",
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H A Dcache.json5 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load",
11 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load",
17 …e was reloaded from another chip's L4 on a different Node or Group (Distant) due to a demand load",
23 …fDescription": "The processor's data cache was reloaded from local core's L2 due to a demand load",
35 …or's data cache was reloaded from a localtion other than the local core's L2 due to a demand load",
41 …r's data cache was reloaded from local core's L2 with load hit store conflict due to a demand load
42 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit s…
47 …cessor's data cache was reloaded from local core's L2 with dispatch conflict due to a demand load",
53 …s reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to a demand load",
59 …he processor's data cache was reloaded from local core's L2 without conflict due to a demand load",
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopLoadElimination.cpp1 //===- LoopLoadElimination.cpp - Loop Load Elimination Pass ---------------===//
9 // This file implement a loop-aware load elimination pass.
14 // of the corresponding load. This makes the load dead.
18 // load.
66 #define LLE_OPTION "loop-load-elim"
70 "runtime-check-per-loop-load-elim", cl::Hidden,
71 cl::desc("Max number of memchecks allowed per eliminated load on average"),
75 "loop-load-elimination-scev-check-threshold", cl::init(8), cl::Hidden,
77 "Load Elimination"));
85 LoadInst *Load; member
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H A DGVN.cpp10 // instructions. It also performs simple dead load elimination.
109 static cl::opt<bool> GVNEnableLoadPRE("enable-load-pre", cl::init(true));
110 static cl::opt<bool> GVNEnableLoadInLoopPRE("enable-load-in-loop-pre",
113 GVNEnableSplitBackedgeInLoadPRE("enable-split-backedge-in-load-pre",
119 cl::desc("Max number of dependences to attempt Load PRE (default = 100)"));
194 LoadVal, // A value produced by a load.
198 SelectVal, // A pointer select which is loaded from and for which the load
207 /// Offset - The byte offset in Val that is interesting for the load query.
228 static AvailableValue getLoad(LoadInst *Load, unsigned Offset = 0) { in getLoad()
230 Res.Val = Load; in getLoad()
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/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/cli_root/zfs_load-key/
H A Dzfs_load-key.ksh26 # 'zfs load-key' should only load a key for an unloaded encrypted dataset.
29 # 1. Attempt to load the default dataset's key
31 # 3. Attempt to load the default dataset's key
34 # 6. Attempt to load the dataset's key
36 # 8. Attempt to load the dataset's key again
39 # 11. Attempt to load the pool's key
41 # 13. Attempt to load the pool's key again
54 log_assert "'zfs load-key' should only load the key for an" \
57 log_mustnot eval "echo $PASSPHRASE | zfs load-key $TESTPOOL/$TESTFS"
60 log_mustnot eval "echo $PASSPHRASE | zfs load-key $TESTPOOL/$TESTFS"
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H A Dzfs_load-key_noop.ksh26 # 'zfs load-key -n' should load the key for an already loaded dataset.
30 # 2. Attempt to load the dataset's key
32 # 4. Attempt to load the dataset's key with an invalid key
44 log_assert "'zfs load-key -n' should load the key for a loaded dataset"
49 log_must eval "echo $PASSPHRASE | zfs load-key -n $TESTPOOL/$TESTFS1"
52 log_mustnot eval "echo $PASSPHRASE1 | zfs load-key -n $TESTPOOL/$TESTFS1"
54 log_pass "'zfs load-key -n' loads the key for a loaded dataset"
/freebsd/contrib/libucl/python/tests/
H A Dtest_load.py7 ucl.load()
11 ucl.load(0,0)
14 self.assertEqual(ucl.load(None), None)
19 self.assertEqual(ucl.load(data), valid)
24 self.assertEqual(ucl.load(data), valid)
29 self.assertEqual(ucl.load(data), valid)
34 self.assertEqual(ucl.load(data), valid)
39 self.assertEqual(ucl.load(data), valid)
44 self.assertEqual(ucl.load(data), valid)
52 self.assertEqual(ucl.load(data), valid)
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZPatterns.td39 // with LOAD, OPERATOR and STORE being the read, modify and write
42 class RMWI<SDPatternOperator load, SDPatternOperator operator,
45 : Pat<(store (operator (load mode:$addr), imm:$src), mode:$addr),
57 // The inserted operand is loaded using LOAD from an address of mode MODE.
59 SDPatternOperator load, AddressingMode mode> {
61 cls:$src1, (load mode:$src2)),
64 (load mode:$src2), cls:$src1),
97 // condition is false. Record that they are equivalent to a LOAD/select/STORE
100 SDPatternOperator store, SDPatternOperator load,
102 def : Pat<(store (z_select_ccmask GR64:$new, (load mode:$addr),
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/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a55/
H A Dpipeline.json27 …re is an interlock. Stall cycles due to a stall in Wr (typically awaiting load data) are excluded",
30 …ere is an interlock. Stall cycles due to a stall in Wr (typically awaiting load data) are excluded"
33 …due to a load/store instruction waiting for data to calculate the address in the AGU. Stall cycles…
36 …due to a load/store instruction waiting for data to calculate the address in the AGU. Stall cycles…
39 …truction. Stall cycles due to a stall in the Wr stage (typically awaiting load data) are excluded",
42 …struction. Stall cycles due to a stall in the Wr stage (typically awaiting load data) are excluded"
45 …peration issued due to the backend, load.This event counts every cycle there is a stall in the Wr …
48 …peration issued due to the backend, load.This event counts every cycle there is a stall in the Wr …
57 …on issued due to the backend, load, cache miss.This event counts every cycle there is a stall in t…
60 …on issued due to the backend, load, cache miss.This event counts every cycle there is a stall in t…
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/freebsd/contrib/netbsd-tests/lib/libc/stdlib/
H A Dt_getopt.sh31 load: $1
57 load="c:d"
59 h_getopt "${load}" "foo -c 1 -d foo" "c=1,d|1"
60 h_getopt "${load}" "foo -d foo bar" "d|2"
61 h_getopt "${load}" "foo -c 2 foo bar" "c=2|2"
62 h_getopt "${load}" "foo -e 1 foo bar" "!?|3"
63 h_getopt "${load}" "foo -d -- -c 1" "d|2"
64 h_getopt "${load}" "foo -c- 1" "c=-|1"
65 h_getopt "${load}" "foo -d - 1" "d|2"
76 load="optstring: abc:
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8994-msft-lumia-octagon.dtsi32 * Most Lumia 950/XL users use GRUB to load their kernels,
587 regulator-allow-set-load;
588 regulator-system-load = <300000>;
594 regulator-allow-set-load;
596 regulator-system-load = <325000>;
602 regulator-allow-set-load;
603 regulator-system-load = <325000>;
624 regulator-allow-set-load;
625 regulator-system-load = <4160>;
632 regulator-allow-set-load;
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DLoads.h1 //===- Loads.h - Local load analysis --------------------------------------===//
9 // This file declares simple local analyses for load instructions.
63 /// Return true if we know that executing a load from this value cannot trap.
66 /// analysis and returns true if it is safe to load immediately before ScanFrom.
68 /// If it is not obviously safe to load from the specified pointer, we do a
78 /// Return true if we can prove that the given load (which is assumed to be
94 /// Return true if we know that executing a load from this value cannot trap.
97 /// analysis and returns true if it is safe to load immediately before ScanFrom.
99 /// If it is not obviously safe to load from the specified pointer, we do a
113 /// Scan backwards to see if we have the value of the given load available
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/freebsd/contrib/llvm-project/llvm/lib/Object/
H A DMachOObjectFile.cpp196 return malformedError("load command " + Twine(LoadCommandIndex) + in getLoadCommandInfo()
199 return malformedError("load command " + Twine(LoadCommandIndex) + in getLoadCommandInfo()
211 return malformedError("load command 0 extends past the end all load " in getFirstLoadCommandInfo()
225 return malformedError("load command " + Twine(LoadCommandIndex + 1) + in getNextLoadCommandInfo()
226 " extends past the end all load commands in the file"); in getNextLoadCommandInfo()
281 // Parses LC_SEGMENT or LC_SEGMENT_64 load command, adds addresses of all
286 const MachOObjectFile &Obj, const MachOObjectFile::LoadCommandInfo &Load, in parseSegmentLoadCommand() argument
291 if (Load.C.cmdsize < SegmentLoadSize) in parseSegmentLoadCommand()
292 return malformedError("load command " + Twine(LoadCommandIndex) + in parseSegmentLoadCommand()
294 if (auto SegOrErr = getStructOrErr<Segment>(Obj, Load.Ptr)) { in parseSegmentLoadCommand()
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/freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DLSUnit.cpp10 /// A Load-Store Unit for the llvm-mca tool.
85 // A store may not pass a previous load or load barrier. in dispatch()
127 assert(IS.getMayLoad() && "Expected a load!"); in dispatch()
132 // A new load group is created if we are in one of the following situations: in dispatch()
133 // 1) This is a load barrier (by construction, a load barrier is always in dispatch()
135 // 2) There is no load in flight (by construction we always keep loads and in dispatch()
137 // 3) There is a load barrier in flight. This load depends on it. in dispatch()
138 // 4) There is an intervening store between the last load dispatched to the in dispatch()
139 // LSU and this load. We always create a new group even if this load in dispatch()
141 // 5) There is no intervening store and there is an active load group. in dispatch()
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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/
H A Dother.json45 …ssor's data cache was reloaded from a location other than the local core's L3 due to a marked load"
60 …"BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The strea…
135 …n an enabled section of the Load Monitored region. This event, therefore, should not occur if the…
145 …r's data cache was reloaded from local core's L2 with load hit store conflict due to a demand load"
170 "BriefDescription": "Load tm hit in L1"
205 … to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load"
225 …cles to reload from another chip's memory on the same Node or Group (Distant) due to a marked load"
230 "BriefDescription": "Duration in cycles to reload from local core's L2 due to a marked load"
235 … "BriefDescription": "Core TM load hits line in L3 in TM_SC state and causes it to be invalidated"
255 …r's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load"
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H A Dmarked.json25 …e was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load"
105 "BriefDescription": "DL1 reloaded due to Demand Load"
110 … "Duration in cycles to reload from a location other than the local core's L3 due to a marked load"
130 …ption": "The processor's data cache was reloaded from the local chip's Memory due to a demand load"
145 …ption": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load"
165 …Description": "Initial and Final Pump Scope was system pump (prediction=correct) for a demand load"
180 …che was reloaded with Shared (S) data from another core's L3 on the same chip due to a demand load"
185 …e was reloaded with Modified (M) data from another core's L3 on the same chip due to a demand load"
190 …cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a demand load"
200 … "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for a demand load"
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULowerKernelAttributes.cpp113 auto *Load = dyn_cast<LoadInst>(U); // Load from ImplicitArgPtr/DispatchPtr? in processUse() local
115 if (!Load && !BCI) { in processUse()
118 Load = dyn_cast<LoadInst>(*U->user_begin()); // Load from GEP? in processUse()
125 Load = dyn_cast<LoadInst>(*BCI->user_begin()); // Load from BCI? in processUse()
128 if (!Load || !Load->isSimple()) in processUse()
131 unsigned LoadSize = DL.getTypeStoreSize(Load->getType()); in processUse()
138 BlockCounts[0] = Load; in processUse()
142 BlockCounts[1] = Load; in processUse()
146 BlockCounts[2] = Load; in processUse()
150 GroupSizes[0] = Load; in processUse()
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/freebsd/sys/crypto/openssl/arm/
H A Dchacha-armv4.S67 ldmia r12,{r4,r5,r6,r7} @ load counter and nonce
68 sub sp,sp,#4*(16) @ off-load area
71 ldmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} @ load key
72 ldmia r14,{r0,r1,r2,r3} @ load sigma
75 str r10,[sp,#4*(16+10)] @ off-load "rx"
76 str r11,[sp,#4*(16+11)] @ off-load "rx"
81 ldmia sp,{r0,r1,r2,r3,r4,r5,r6,r7,r8,r9} @ load key material
87 ldr r12,[sp,#4*(12)] @ modulo-scheduled load
207 ldr r11,[sp,#4*(32+2)] @ load len
223 ldrhs r12,[sp,#4*(32+1)] @ ... load inp
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A Dmemory.json3load) of the load buffer is stalled due to any number of reasons, including an L1 miss, WCB full, …
12 …dest load) of the load buffer is stalled due to a core bound stall including a store address match…
21 …les that the head (oldest load) of the load buffer is stalled due to other block cases when load s…
32 …s the number of cycles that the head (oldest load) of the load buffer is stalled due to a pagewalk…
43 …number of cycles that the head (oldest load) of the load buffer is stalled due to a store address …
87 "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
110 "BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
122 "BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
/freebsd/contrib/llvm-project/llvm/lib/ObjCopy/MachO/
H A DMachOObject.h80 // and it is a union of all the structs corresponding to various load
84 // The raw content of the payload of the load command (located right after the
89 // Some load commands can contain (inside the payload) an array of sections,
95 // Returns the segment name if the load command is a segment command.
98 // Returns the segment vm address if the load command is a segment command.
133 /// load command.
167 /// load command.
202 /// LC_DYLD_INFO load command. Dyld rebases an image whenever dyld loads it at
218 /// LC_DYLD_INFO load command. Dyld binds an image during the loading process,
234 /// LC_DYLD_INFO load comman
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/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json45 …an interlock on an address operand. This type of interlock is caused by a load/store instruction w…
48 …an interlock on an address operand. This type of interlock is caused by a load/store instruction w…
57 …tion issued due to the backend, load. This event counts every cycle where there is a stall in the …
60 …tion issued due to the backend, load. This event counts every cycle where there is a stall in the …
69 …ssued due to the backend, load, cache miss. This event counts every cycle where there is a stall i…
72 …ssued due to the backend, load, cache miss. This event counts every cycle where there is a stall i…
75 …issued due to the backend, load, TLB miss. This event counts every cycle where there is a stall in…
78 …issued due to the backend, load, TLB miss. This event counts every cycle where there is a stall in…
/freebsd/sys/contrib/openzfs/etc/init.d/
H A Dzfs-load-key.in4 # zfs-load-key This script will load/unload the zfs filesystems keys.
7 # description: This script will load or unload the zfs filesystems keys during
13 # Provides: zfs-load-key
20 # Short-Description: Load ZFS keys for filesystems and volumes
21 # Description: Run the `zfs load-key` or `zfs unload-key` commands.
43 # Load keys for all datasets/filesystems
46 zfs_log_begin_msg "Load ZFS filesystem(s) keys"
56 zfs_action "Load key for $encryptionroot" \
57 "$ZFS" load
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