| /linux/drivers/phy/ |
| H A D | phy-lpc18xx-usb-otg.c | 29 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_init() local
33 ret = clk_set_rate(lpc->clk, 480000000); in lpc18xx_usb_otg_phy_init()
37 return clk_prepare(lpc->clk); in lpc18xx_usb_otg_phy_init()
42 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_exit() local
44 clk_unprepare(lpc->clk); in lpc18xx_usb_otg_phy_exit()
51 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_power_on() local
54 ret = clk_enable(lpc->clk); in lpc18xx_usb_otg_phy_power_on()
59 ret = regmap_update_bits(lpc->reg, LPC18XX_CREG_CREG0, in lpc18xx_usb_otg_phy_power_on()
62 clk_disable(lpc->clk); in lpc18xx_usb_otg_phy_power_on()
71 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_power_off() local
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| /linux/drivers/clocksource/ |
| H A D | clksrc_st_lpc.c | 3 * Clocksource using the Low Power Timer found in the Low Power Controller (LPC)
18 #include <dt-bindings/mfd/st-lpc.h>
55 "clksrc-st-lpc", rate, 300, 32, in st_clksrc_init()
58 pr_err("clksrc-st-lpc: Failed to register clocksource\n"); in st_clksrc_init()
71 pr_err("clksrc-st-lpc: Failed to get LPC clock\n"); in st_clksrc_setup_clk()
76 pr_err("clksrc-st-lpc: Failed to enable LPC clock\n"); in st_clksrc_setup_clk()
81 pr_err("clksrc-st-lpc: Failed to get LPC clock rate\n"); in st_clksrc_setup_clk()
96 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_clksrc_of_register()
98 pr_err("clksrc-st-lpc: An LPC mode must be provided\n"); in st_clksrc_of_register()
102 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_clksrc_of_register()
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | st_lpc_wdt.txt | 1 STMicroelectronics Low Power Controller (LPC) - Watchdog
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
7 [See: ../rtc/rtc-st-lpc.txt for RTC options]
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Should be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
33 lpc@fde05000 {
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| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | rtc-st-lpc.txt | 1 STMicroelectronics Low Power Controller (LPC) - RTC
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Must be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
23 lpc@fde05000 {
24 compatible = "st,stih407-lpc";
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | st,stih407-lpc | 1 STMicroelectronics Low Power Controller (LPC) - Clocksource
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
8 [See: ../rtc/rtc-st-lpc.txt for RTC options]
12 - compatible : Must be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
23 lpc@fde05000 {
24 compatible = "st,stih407-lpc";
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| /linux/drivers/soc/aspeed/ |
| H A D | Kconfig | 8 tristate "ASPEED LPC firmware cycle control"
13 Control LPC firmware cycle mappings through ioctl()s. The driver
15 host LPC read/write region can be buffered.
18 tristate "ASPEED LPC snoop support"
23 Provides a driver to control the LPC snoop interface which
25 the host to an arbitrary LPC I/O port.
|
| H A D | aspeed-lpc-snoop.c | 5 * Provides a simple driver to control the ASPEED LPC snoop interface which
7 * the host to an arbitrary LPC I/O port.
27 #define DEVICE_NAME "aspeed-lpc-snoop"
250 /* Enable LPC snoop channel at requested port */ in aspeed_lpc_enable_snoop()
308 if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") && in aspeed_lpc_snoop_probe()
309 !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") && in aspeed_lpc_snoop_probe()
310 !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) { in aspeed_lpc_snoop_probe()
311 dev_err(dev, "unsupported LPC device binding\n"); in aspeed_lpc_snoop_probe()
361 { .compatible = "aspeed,ast2400-lpc-snoop",
363 { .compatible = "aspeed,ast2500-lpc-snoop",
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| /linux/drivers/watchdog/ |
| H A D | st_lpc_wdt.c | 3 * ST's LPC Watchdog
22 #include <dt-bindings/mfd/st-lpc.h>
28 /* LPC as WDT */
57 .compatible = "st,stih407-lpc",
128 .identity = "ST LPC WDT",
160 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_wdog_probe()
162 dev_err(dev, "An LPC mode must be provided\n"); in st_wdog_probe()
166 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_wdog_probe()
229 dev_info(dev, "LPC Watchdog driver registered, reset type is %s", in st_wdog_probe()
284 .name = "st-lpc-wdt",
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| /linux/arch/powerpc/platforms/powernv/ |
| H A D | opal-lpc.c | 3 * PowerNV LPC bus handling.
187 struct lpc_debugfs_entry *lpc = filp->private_data; in lpc_debug_read() local
204 if (lpc->lpc_type == OPAL_LPC_FW) { in lpc_debug_read()
210 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos, in lpc_debug_read()
224 * respective positions (ie, LPC position). in lpc_debug_read()
229 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that in lpc_debug_read()
278 struct lpc_debugfs_entry *lpc = filp->private_data; in lpc_debug_write() local
295 if (lpc->lpc_type == OPAL_LPC_FW) { in lpc_debug_write()
334 rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos, in lpc_debug_write()
374 root = debugfs_create_dir("lpc", arch_debugfs_dir); in opal_lpc_init_debugfs()
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| /linux/include/linux/ |
| H A D | dtlk.h | 21 (that is, all but LPC) */
43 /* LPC speak commands */
49 /* LPC Port Status Flags (valid only after one of the LPC
52 indicates the LPC synthesizer is
55 indicates that the hardware LPC
60 indicates that the LPC data buffer
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| /linux/Documentation/devicetree/bindings/arm/hisilicon/ |
| H A D | low-pin-count.yaml | 13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
17 LPC device node.
28 - hisilicon,hip06-lpc
29 - hisilicon,hip07-lpc
50 compatible = "hisilicon,hip06-lpc";
|
| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | irq-chip-model.rst | 16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
51 | PCH-LPC | | Devices | | Devices |
64 PCH-LPC/PCH-MSI，然後被EIOINTC統一收集，再直接到達CPUINTC::
82 | PCH-LPC | | Devices | | Devices |
129 PCH-LPC::
157 - PCH-LPC：即《龍芯7A1000橋片用戶手冊》第24.3節所描述的“LPC中斷”。
|
| /linux/drivers/rtc/ |
| H A D | rtc-st-lpc.c | 3 * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer
25 #include <dt-bindings/mfd/st-lpc.h>
37 /* LPC as WDT */
191 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_rtc_probe()
193 dev_err(&pdev->dev, "An LPC mode must be provided\n"); in st_rtc_probe()
197 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_rtc_probe()
296 { .compatible = "st,stih407-lpc" },
303 .name = "st-lpc-rtc",
312 MODULE_DESCRIPTION("STMicroelectronics LPC RTC driver");
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| /linux/arch/x86/kernel/ |
| H A D | i8237.c | 17 * 8237A DMA controller (used for ISA and LPC).
61 * LPC traffic for POST codes. Original LPC only decodes one byte of in i8237A_init_ops()
62 * port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x in i8237A_init_ops()
70 * support 8237 DMA or bus mastering from LPC. Platform firmware in i8237A_init_ops()
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | 8250.yaml | 18 - aspeed,lpc-io-reg
20 - aspeed,lpc-interrupts
287 configured. One possible data source is the LPC/eSPI mode bit. Only
291 aspeed,lpc-io-reg:
295 The VUART LPC address. Only applicable to aspeed,ast2500-vuart.
297 aspeed,lpc-interrupts:
345 aspeed,lpc-io-reg = <0x3f8>;
346 aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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| /linux/drivers/char/ipmi/ |
| H A D | kcs_bmc_aspeed.c | 34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
39 * IRQXEy Assert the SerIRQ specified in IDyIRQX for LPC channel y
535 "aspeed,lpc-io-reg", in aspeed_kcs_of_get_io_address()
538 dev_err(&pdev->dev, "No valid 'aspeed,lpc-io-reg' configured\n"); in aspeed_kcs_of_get_io_address()
543 dev_err(&pdev->dev, "Invalid data address in 'aspeed,lpc-io-reg'\n"); in aspeed_kcs_of_get_io_address()
548 dev_err(&pdev->dev, "Invalid status address in 'aspeed,lpc-io-reg'\n"); in aspeed_kcs_of_get_io_address()
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| /linux/arch/powerpc/include/asm/ |
| H A D | mpc5121.h | 47 * LPC Module
75 u32 data_word; /* LPC RX/TX FIFO Data Word Register */
76 u32 fifo_status; /* LPC RX/TX FIFO Status Register */
77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */
78 u32 fifo_alarm; /* LPC RX/TX FIFO Alarm Register */
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| /linux/drivers/mcb/ |
| H A D | Kconfig | 33 tristate "LPC (non PCI) based MCB carrier"
37 This is a MCB carrier on a LPC or non PCI device.
39 If build as a module, the module is called mcb-lpc.ko
|
| /linux/drivers/irqchip/ |
| H A D | irq-loongson-pch-lpc.c | 3 * Loongson LPC Interrupt Controller support
8 #define pr_fmt(fmt) "lpc: " fmt
97 .name = "PCH LPC",
141 /* Enable the LPC interrupt, bit31: en bit30: edge */ in pch_lpc_reset()
197 pr_err("Failed to get LPC status\n"); in pch_lpc_acpi_init()
208 * The LPC interrupt controller is a legacy i8259-compatible device, in pch_lpc_acpi_init()
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| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-amd-ethanolx.dts | 251 aspeed,lpc-io-reg = <0x60>;
256 aspeed,lpc-io-reg = <0x62>;
261 aspeed,lpc-io-reg = <0xCA2>;
266 aspeed,lpc-io-reg = <0x97DE>;
275 //Enable lpc clock
281 aspeed,lpc-io-reg = <0x3f8>;
282 aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
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| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-driver-aspeed-vuart | 5 will appear on the host <-> BMC LPC bus.
13 the UART will appear on the host <-> BMC LPC bus.
21 host via the BMC LPC bus.
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | nxp,lpc-eth.yaml | 4 $id: http://devicetree.org/schemas/net/nxp,lpc-eth.yaml#
14 const: nxp,lpc-eth
42 compatible = "nxp,lpc-eth";
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| /linux/Documentation/devicetree/bindings/soc/aspeed/ |
| H A D | uart-routing.yaml | 44 lpc: lpc@1e789000 {
45 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
|
| /linux/drivers/mfd/ |
| H A D | lpc_sch.c | 3 * lpc_sch.c - LPC interface for Intel Poulsbo SCH
5 * LPC bridge function of the Intel SCH contains many other
7 * Power Management, System Management, GPIO, RTC, and LPC
187 MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
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| /linux/drivers/net/ethernet/nxp/ |
| H A D | Kconfig | 3 tristate "NXP ethernet MAC on LPC devices"
9 some NXP LPC devices. You can safely enable this option for LPC32xx
|