17fbcf3afSJeremy KerrWhat: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address 27fbcf3afSJeremy KerrDate: April 2017 37fbcf3afSJeremy KerrContact: Jeremy Kerr <jk@ozlabs.org> 47fbcf3afSJeremy KerrDescription: Configures which IO port the host side of the UART 57fbcf3afSJeremy Kerr will appear on the host <-> BMC LPC bus. 67fbcf3afSJeremy KerrUsers: OpenBMC. Proposed changes should be mailed to 77fbcf3afSJeremy Kerr openbmc@lists.ozlabs.org 87fbcf3afSJeremy Kerr 9*8d310c91SOskar SenftWhat: /sys/bus/platform/drivers/aspeed-vuart/*/sirq 107fbcf3afSJeremy KerrDate: April 2017 117fbcf3afSJeremy KerrContact: Jeremy Kerr <jk@ozlabs.org> 127fbcf3afSJeremy KerrDescription: Configures which interrupt number the host side of 137fbcf3afSJeremy Kerr the UART will appear on the host <-> BMC LPC bus. 147fbcf3afSJeremy KerrUsers: OpenBMC. Proposed changes should be mailed to 157fbcf3afSJeremy Kerr openbmc@lists.ozlabs.org 16*8d310c91SOskar Senft 17*8d310c91SOskar SenftWhat: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity 18*8d310c91SOskar SenftDate: July 2019 19*8d310c91SOskar SenftContact: Oskar Senft <osk@google.com> 20*8d310c91SOskar SenftDescription: Configures the polarity of the serial interrupt to the 21*8d310c91SOskar Senft host via the BMC LPC bus. 22*8d310c91SOskar Senft Set to 0 for active-low or 1 for active-high. 23*8d310c91SOskar SenftUsers: OpenBMC. Proposed changes should be mailed to 24*8d310c91SOskar Senft openbmc@lists.ozlabs.org 25