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/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-jtag.c36 #include <asm/octeon/cvmx-helper-jtag.h>
40 * Initialize the internal QLM JTAG logic to allow programming
41 * of the JTAG chain by the cvmx_helper_qlm_jtag_*() functions.
43 * Networks. Programming incorrect values into the JTAG chain
59 * Clock divider for QLM JTAG operations. eclk is divided by in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
84 * Returns The low order bits of the JTAG chain that shifted out of the
104 * Shift long sequences of zeros into the QLM JTAG chain. It is
125 * Program the QLM JTAG chain into all lanes of the QLM. You must
[all …]
/linux/drivers/soc/rockchip/
H A Dgrf.c32 * Disable auto jtag/sdmmc switching that causes issues with the
35 { "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
47 { "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
59 { "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
71 { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
83 { "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
94 { "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
105 { "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
141 { "jtag switching", RK3576_IOCGRF_MISC_CON, HIWORD_UPDATE(0, 1, 1) },
152 { "jtag switching", RK3588_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 14) },
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt76x8.c73 FUNC("sdxc jtag", 3, 22, 8),
105 FUNC("p4led_kn jtag", 3, 30, 1),
111 FUNC("p3led_kn jtag", 3, 31, 1),
117 FUNC("p2led_kn jtag", 3, 32, 1),
123 FUNC("p1led_kn jtag", 3, 33, 1),
129 FUNC("p0led_kn jtag", 3, 34, 1),
138 FUNC("p4led_an jtag", 3, 39, 1),
144 FUNC("p3led_an jtag", 3, 40, 1),
150 FUNC("p2led_an jtag", 3, 41, 1),
156 FUNC("p1led_an jtag", 3, 42, 1),
[all …]
H A Dpinctrl-rt305x.c46 static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
72 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
85 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
101 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
H A Dpinctrl-rt2880.c21 static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
30 GRP("jtag", jtag_grp, 1, RT2880_GPIO_MODE_JTAG),
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt7981-pinctrl.yaml91 "jtag" "jtag" 4, 5, 6, 7, 8
92 "wm_jtag_0" "jtag" 4, 5, 6, 7, 8
93 "wo0_jtag_0" "jtag" 9, 10, 11, 12, 13
129 "wm_jtag_1" "jtag" 20, 21, 22, 23, 24
130 "wo0_jtag_1" "jtag" 25, 26, 27, 28, 29
161 enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led,
191 const: jtag
195 enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1]
H A Dralink,rt2880-pinctrl.yaml38 enum: [gpio, i2c, spi, uartlite, jtag, mdio, sdram, pci]
57 enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci]
89 const: jtag
93 enum: [jtag]
H A Dralink,rt305x-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio,
59 enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite]
100 const: jtag
104 enum: [jtag]
H A Dralink,rt5350-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,
59 enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]
100 const: jtag
104 enum: [jtag]
H A Dralink,rt3352-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, lna,
59 enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1,
101 const: jtag
105 enum: [jtag]
H A Dmediatek,mt7621-pinctrl.yaml38 enum: [gpio, i2c, i2s, jtag, mdio, nand1, nand2, pcie refclk,
59 enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi,
83 const: jtag
87 enum: [jtag]
H A Dralink,rt3883-pinctrl.yaml38 enum: [ge1, ge2, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag,
77 enum: [ge1, ge2, i2c, jtag, lna a, lna g, mdio, pci, spi,
119 const: jtag
123 enum: [jtag]
H A Dlantiq,pinctrl-xway.txt46 exin0, exin1, exin2, jtag, spi_di, spi_do, spi_clk, spi_cs1, spi_cs2,
51 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
55 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
62 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
/linux/arch/arm/mach-davinci/
H A Dcputype.h20 u8 variant; /* JTAG ID bits 31:28 */
21 u16 part_no; /* JTAG ID bits 27:12 */
22 u16 manufacturer; /* JTAG ID bits 11:1 */
/linux/drivers/pinctrl/
H A Dpinctrl-th1520.c133 [TH1520_MUX_JTAG] = "jtag",
177 TH1520_PAD(11, CPU_JTG_TCLK, JTAG, ____, ____, GPIO, ____, ____, 0),
178 TH1520_PAD(12, CPU_JTG_TMS, JTAG, ____, ____, GPIO, ____, ____, 0),
179 TH1520_PAD(13, CPU_JTG_TDI, JTAG, ____, ____, GPIO, ____, ____, 0),
180 TH1520_PAD(14, CPU_JTG_TDO, JTAG, ____, ____, GPIO, ____, ____, 0),
181 TH1520_PAD(15, CPU_JTG_TRST, JTAG, ____, ____, GPIO, ____, ____, 0),
238 TH1520_PAD(22, GPIO0_22, GPIO, JTAG, I2C, ____, DPU0, DPU1, 0),
239 TH1520_PAD(23, GPIO0_23, GPIO, JTAG, I2C, ____, DPU0, DPU1, 0),
240 TH1520_PAD(24, GPIO0_24, GPIO, JTAG, QSPI, ____, DPU0, DPU1, 0),
241 TH1520_PAD(25, GPIO0_25, GPIO, JTAG, ____, ____, DPU0, DPU1, 0),
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.h618 #define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064) /* PLL JTAG CALNRST */
619 #define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065) /* PLL JTAG IN PLL 1 */
620 #define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066) /* PLL JTAG IN PLL 2 */
621 #define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067) /* PLL JTAG PLL CP 1 */
622 #define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068) /* PLL JTAG PLL CP 2 */
623 #define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069) /* PLL JTAG PLL CP 3 */
624 #define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A) /* PLL JTAG PLL CP 4 */
625 #define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B) /* PLL JTAG PLL Control 1 */
626 #define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C) /* PLL JTAG PLL LF 1 */
627 #define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D) /* PLL JTAG PLL LF 2 */
[all …]
/linux/drivers/tty/hvc/
H A DKconfig81 bool "ARM JTAG DCC console"
86 This console uses the JTAG DCC on ARM to create a console under the HVC
87 driver. This console is used through a JTAG only on ARM. If you don't have
88 a JTAG then you probably don't want this option.
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,r9a06g032-sysctrl.yaml25 - description: Optional external JTAG input
33 - const: jtag
70 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
/linux/arch/arm64/boot/dts/freescale/
H A Ds32g2.dtsi132 jtag_pins: jtag-pins {
133 jtag-grp0 {
140 jtag-grp1 {
145 jtag-grp2 {
152 jtag-grp3 {
158 jtag-grp4 {
H A Ds32g3.dtsi189 jtag_pins: jtag-pins {
190 jtag-grp0 {
197 jtag-grp1 {
202 jtag-grp2 {
209 jtag-grp3 {
215 jtag-grp4 {
/linux/arch/sparc/include/asm/
H A Dfhc.h67 #define FHC_PREGS_JCTRL 0xf0UL /* FHC JTAG Control Register */
68 #define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */
69 #define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */
70 #define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */
/linux/drivers/tty/serial/
H A Daltera_jtaguart.c3 * altera_jtaguart.c -- Altera JTAG UART driver
30 * Altera JTAG UART register definitions according to the Altera JTAG UART
178 dev_err(port->dev, "unable to attach Altera JTAG UART %d interrupt vector=%d\n", in altera_jtaguart_startup()
213 return (port->type == PORT_ALTERA_JTAGUART) ? "Altera JTAG UART" : NULL; in altera_jtaguart_type()
481 MODULE_DESCRIPTION("Altera JTAG UART driver");
/linux/drivers/misc/altera-stapl/
H A Daltera-jtag.c3 * altera-jtag.c
17 #include "altera-jtag.h"
25 * This structure shows, for each JTAG state, which state is reached after
27 * describes all possible state transitions in the JTAG state machine.
79 /* initial JTAG state is unknown */ in altera_jinit()
294 /* initialize JTAG chain to known state */ in altera_goto_jstate()
367 * Causes JTAG hardware to sit in the specified stable in altera_wait_msecs()
369 * no JTAG operations have been performed yet, then only in altera_wait_msecs()
372 * any JTAG operations. in altera_wait_msecs()
986 /* If the JTAG interface was used, reset it to TLR */ in altera_free_buffers()
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun8i-h3.c27 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
33 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
39 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
45 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
387 SUNXI_FUNCTION(0x3, "jtag")), /* MS */
392 SUNXI_FUNCTION(0x3, "jtag")), /* DI */
402 SUNXI_FUNCTION(0x3, "jtag")), /* DO */
412 SUNXI_FUNCTION(0x3, "jtag")), /* CK */
/linux/arch/sh/include/mach-ecovec24/mach/
H A Dpartner-jet-setup.txt7 LIST "This script can be used to boot the kernel from RAM via JTAG:"
13 LIST "Use the following command to burn the zImage to flash via JTAG:"

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