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/freebsd/lib/libpmc/pmu-events/arch/x86/emeraldrapids/
H A D	floating-point.json	68 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 71 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 76 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 79 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 84 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 87 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 92 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 95 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 100 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 103 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	floating-point.json	15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	14 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 20 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 25 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 31 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 36 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 42 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 47 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 53 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 58 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 64 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen6/
H A D	recommended.json	11 "BriefDescription": "All data cache accesses per thousand instructions.", 12 "MetricExpr": "ls_dispatch.all / instructions", 18 "BriefDescription": "All L2 cache accesses per thousand instructions.", 19 … + l2_pf_hit_l2.l2_hwpf + l2_pf_miss_l2_hit_l3.l2_hwpf + l2_pf_miss_l2_l3.l2_hwpf) / instructions", 25 …2 cache accesses from L1 instruction cache misses (including prefetch) per thousand instructions.", 26 "MetricExpr": "l2_request_g1.cacheable_ic_read / instructions", 32 …on": "L2 cache accesses from L1 data cache misses (including prefetch) per thousand instructions.", 33 "MetricExpr": "l2_request_g1.dc_all / instructions", 39 …riefDescription": "L2 cache accesses from L2 cache hardware prefetcher per thousand instructions.", 40 …_dc_l2_hwpf + l2_pf_miss_l2_hit_l3.l1_dc_l2_hwpf + l2_pf_miss_l2_l3.l1_dc_l2_hwpf) / instructions", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/graniterapids/
H A D	floating-point.json	77 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 81 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 86 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 90 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 95 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 99 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 108 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 113 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 117 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	65 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 71 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 76 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 82 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 87 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 93 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 98 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 109 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 48 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen5/
H A D	recommended.json	11 "BriefDescription": "All data cache accesses per thousand instructions.", 12 "MetricExpr": "ls_dispatch.all / instructions", 18 "BriefDescription": "All L2 cache accesses per thousand instructions.", 19 … + l2_pf_hit_l2.l2_hwpf + l2_pf_miss_l2_hit_l3.l2_hwpf + l2_pf_miss_l2_l3.l2_hwpf) / instructions", 25 …2 cache accesses from L1 instruction cache misses (including prefetch) per thousand instructions.", 26 "MetricExpr": "l2_request_g1.cacheable_ic_read / instructions", 32 …on": "L2 cache accesses from L1 data cache misses (including prefetch) per thousand instructions.", 33 "MetricExpr": "l2_request_g1.all_dc / instructions", 39 …riefDescription": "L2 cache accesses from L2 cache hardware prefetcher per thousand instructions.", 40 …_dc_l2_hwpf + l2_pf_miss_l2_hit_l3.l1_dc_l2_hwpf + l2_pf_miss_l2_l3.l1_dc_l2_hwpf) / instructions", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen2/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 11 …ber of micro-ops retired. This count includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/meteorlake/
H A D	floating-point.json	114 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 118 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 124 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 128 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 134 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 138 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 144 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 148 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 154 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 158 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 "PublicDescription": "The number of retired branch instructions, that were mispredicted." 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." 64 "BriefDescription": "Retired Indirect Branch Instructions Mispredicted.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 11 …": "The number of uOps retired. This includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/
H A D	pipeline.json	3 "BriefDescription": "Counts the number of branch instructions retired...", 8 …of any branch instructions retired. Branch prediction predicts the branch target and enables the … 12 "BriefDescription": "Counts the number of taken branch instructions retired", 18 … taken branch instructions retired. Branch prediction predicts the branch target and enables the … 23 "BriefDescription": "Counts the number of near CALL branch instructions retired", 28 …r CALL branch instructions retired. Branch prediction predicts the branch target and enables the … 33 "BriefDescription": "Counts the number of far branch instructions retired", 38 …of far branch instructions retired. Branch prediction predicts the branch target and enables the … 43 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired", 48 …t CALL branch instructions retired. Branch prediction predicts the branch target and enables the … [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMFeatures.td	88 "Enable VFP2 instructions with " 93 "Enable VFP2 instructions", 96 defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions", 100 "Enable NEON instructions", 108 defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions", 123 "floating point fml instructions", 129 "Enable divide instructions in Thumb">; 134 "Enable divide instructions in ARM mode">; 138 // True if the subtarget supports DMB / DSB data barrier instructions. 140 "Has data barrier (dmb/dsb) instructions">; [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A D	floating-point.json	3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A D	floating-point.json	3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A D	floating-point.json	93 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 126 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 137 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 148 …instructions retired; some instructions will count twice as noted below. Each count represents 1 …
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A D	CSKY.td	`23 "Enable FPUv2 single float instructions">; 26 "Enable FPUv2 single float instructions">; 30 "Enable FPUv2 double float instructions">; 33 "Enable FPUv2 double float instructions">; 36 "Enable float divide instructions">; 39 "Enable float divide instructions">; 43 "Enable FPUv3 half word converting instructions">; 46 "Enable FPUv3 half word converting instructions">; 50 "Enable FPUv3 half precision operate instructions">; 53 "Enable FPUv3 half precision operate instructions">; [all …]`
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVScheduleV.td	`13 // Used for widening and narrowing instructions as it doesn't contain M8. 32 // For floating-point instructions, SEW won't be 8. 34 // For widening instructions, SEW will not be 64. 283 // 6. Configuration-Setting Instructions 289 // 7.4. Vector Unit-Stride Instructions 295 // 7.5. Vector Strided Instructions 304 // 7.6. Vector Indexed Instructions 323 // 7.8. Vector Segment Instructions 337 // 7.9. Vector Whole Register Instructions 347 // 11. Vector Integer Arithmetic Instructions [all …]`
H A D	RISCVVLOptimizer.cpp	10 // instructions are inserted. 12 // The purpose of this optimization is to make the VL argument, for instructions 149 // Mask instructions will have 0 as the SEW operand. But the LMUL of these in getEMULEqualsEEWDivSEWTimesLMUL() 150 // instructions is calculated is as if the SEW operand was 3 (e8). in getEMULEqualsEEWDivSEWTimesLMUL() 222 // 6. Configuration-Setting Instructions in getOperandLog2EEW() 223 // Configuration setting instructions do not read or write vector registers in getOperandLog2EEW() 227 llvm_unreachable("Configuration setting instructions do not read or write " in getOperandLog2EEW() 231 // Vector Unit-Stride Instructions in getOperandLog2EEW() 232 // Vector Strided Instructions in getOperandLog2EEW() 258 // Vector Indexed Instructions in getOperandLog2EEW() [all …]
/freebsd/lib/libpmc/
H A D	pmc.core.3	193 The number of branch instructions executed that were mispredicted at 202 instructions executed. 207 instructions executed that were mispredicted. 210 The number of conditional branch instructions executed. 213 The number of conditional branch instructions executed that were mispredicted. 218 instructions executed. 224 The number of indirect branch instructions executed that were mispredicted. 227 The number of branch instructions executed including speculative branches. 230 The number of branch instructions decoded. 234 The number of branch instructions retired. [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A D	ARMFixupKinds.h	24 // LDRD/LDRH/LDRB/etc. instructions. All bits are encoded. 26 // 10-bit PC relative relocation for symbol addresses used in VFP instructions 31 // of Thumb2 instructions. Also used by LDRD in Thumb mode. 33 // 9-bit PC relative relocation for symbol addresses used in VFP instructions 37 // of Thumb2 instructions. 48 // 24-bit PC relative relocation for conditional branch instructions. 50 // 24-bit PC relative relocation for branch instructions. (unconditional) 53 // instructions. 56 // instructions. 59 // 12-bit fixup for Thumb B instructions [all...]

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