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/linux/arch/openrisc/
H A DKconfig93 Select this if your implementation features write through data caches.
110 Select this if your implementation has the Class II instruction l.ff1
116 Select this if your implementation has the Class II instruction l.fl1
122 Select this if your implementation has a hardware multiply instruction
128 Select this if your implementation has a hardware divide instruction
138 Select this if your implementation has support for the Class II
151 Select this if your implementation has support for the Class II
164 Select this if your implementation has support for the Class II
177 Select this if your implementation has support for the Class II
/linux/Documentation/core-api/
H A Dgenericirq.rst28 The original implementation of interrupt handling in Linux uses the
33 a quite universal set for the ARM interrupt handler implementation in
42 During the implementation we identified another type:
51 This split implementation of high-level IRQ handlers allows us to
56 The original general IRQ implementation used hw_interrupt_type
76 flow handler implementation also makes it simple to provide
82 IRQ-flow implementation for 'level type' interrupts and add a
83 (sub)architecture specific 'edge type' implementation.
225 handle_level_irq provides a generic implementation for level-triggered
238 handle_fasteoi_irq provides a generic implementation for interrupts,
[all …]
/linux/drivers/iommu/generic_pt/
H A DKconfig29 IOMMU_PT provides an implementation of the page table operations
31 implementation of the page table operations that can be shared by
39 iommu_domain implementation for the AMD v1 page table. AMDv1 is the
49 iommu_domain implementation for the Intel VT-d's 64 bit 3/4/5
59 iommu_domain implementation for the x86 64-bit 4/5 level page table.
/linux/security/selinux/
H A Dxfrm.c145 * LSM hook implementation that authorizes that a flow can use a xfrm policy
167 * LSM hook implementation that authorizes that a state matches
253 * LSM hook implementation that checks and/or returns the xfrm sid for the
277 * LSM hook implementation that allocs and transfers uctx spec to xfrm_policy.
287 * LSM hook implementation that copies security data structure from old to new
309 * LSM hook implementation that frees xfrm_sec_ctx security information.
317 * LSM hook implementation that authorizes deletion of labeled policies.
325 * LSM hook implementation that allocates a xfrm_sec_state, populates it using
335 * LSM hook implementation that allocates a xfrm_sec_state and populates based
377 * LSM hook implementation that frees xfrm_state security information.
[all …]
/linux/drivers/dpll/zl3073x/
H A DKconfig18 tristate "I2C bus implementation for Microchip Azurite devices"
23 This is I2C bus implementation for Microchip Azurite DPLL/PTP/SyncE
30 tristate "SPI bus implementation for Microchip Azurite devices"
35 This is SPI bus implementation for Microchip Azurite DPLL/PTP/SyncE
/linux/Documentation/networking/caif/
H A Dlinux_caif.rst29 The implementation of CAIF is divided into:
32 * CAIF Core Protocol Implementation
59 Implementation chapter
75 The Core CAIF implementation contains:
77 - Simple implementation of CAIF.
92 Implementation. The support functions include:
94 - CFPKT CAIF Packet. Implementation of CAIF Protocol Packet. The
98 The CAIF Protocol implementation contains:
/linux/drivers/char/xilinx_hwicap/
H A Dfifo_icap.h13 * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
15 * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
17 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
19 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
20 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
H A Dbuffer_icap.h13 * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
15 * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
17 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
19 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
20 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
/linux/tools/testing/selftests/powerpc/tm/
H A Dtm.h38 * Transactional Memory was removed in ISA 3.1. A synthetic TM implementation
40 * synthetic implementation immediately fails after tbegin. This failure sets
41 * Bit 7 (Failure Persistent) and Bit 15 (Implementation-specific).
49 * times in case we got an Implementation-specific failure on a non ISA in htm_is_synthetic()
50 * v3.1 system. On these systems the Implementation-specific failure in htm_is_synthetic()
/linux/Documentation/arch/arm/samsung/
H A Dgpio.rst2 Samsung GPIO implementation
8 This outlines the Samsung GPIO implementation and the architecture
15 The gpio implementation uses gpiolib as much as possible, only providing
27 implementation to configure pins as necessary.
/linux/drivers/firmware/smccc/
H A Dkvm_guest.c73 pr_warn("Unsupported target CPU implementation version v%d.%d\n", in kvm_arm_target_impl_cpu_init()
79 pr_warn("No target implementation CPUs specified\n"); in kvm_arm_target_impl_cpu_init()
94 pr_warn("Discovering target implementation CPUs failed\n"); in kvm_arm_target_impl_cpu_init()
103 pr_warn("Failed to set target implementation CPUs\n"); in kvm_arm_target_impl_cpu_init()
107 pr_info("Number of target implementation CPUs is %lld\n", max_cpus); in kvm_arm_target_impl_cpu_init()
/linux/Documentation/driver-api/
H A Dmen-chameleon-bus.rst9 1.2 Limitations of the current implementation
27 This document describes the architecture and implementation of the MEN
34 implementation and does by no means describe the complete possibilities of MCB
37 Limitations of the current implementation
40 The current implementation is limited to PCI and PCIe based carrier devices
69 not handled by the MCB implementation.
98 The current implementation assigns exactly one memory and one IRQ resource
H A Dgeneric_pt.rst27 format headers and the generic code for the implementation. For instance in an
28 implementation compilation unit the headers would normally be included as
39 #include "../iommu_pt.h" /* The IOMMU implementation */
46 IOMMU implementation uses multi-compilation to generate per-format ops structs
60 The implementation will further wrap struct pt_common in its own top-level
91 where a uniquely named per-format inline function provides the implementation
/linux/Documentation/locking/
H A Dfutex-requeue-pi.rst16 Without requeue_pi, the glibc implementation of
20 implementation would wake the highest-priority waiter, and leave the
56 user space already holding the PI futex. The glibc implementation
81 The actual glibc implementation will likely test for PI and make the
86 Implementation chapter
106 to be requeued to a PI-aware futex. The implementation is the
/linux/Documentation/i2c/
H A Dsummary.rst42 Linux kernel implementation it is also called an "adapter" or "bus". Controller
48 own implementation.
51 controller. In the Linux kernel implementation it is also called a "client".
68 As mentioned above, the Linux I2C implementation historically uses the terms
70 have these synonyms in their name. So, when discussing implementation details,
/linux/Documentation/ABI/testing/
H A Dconfigfs-tsm-report16 options The format of the report is implementation specific
17 where the implementation is conveyed via the @provider
81 (WO) Attribute is visible if a TSM implementation provider
101 (WO) Attribute is visible if a TSM implementation provider
118 (WO) Attribute is visible if a TSM implementation provider
136 (WO) Attribute is visible if a TSM implementation provider
/linux/Documentation/networking/
H A Dx25.rst8 write an X.25 implementation for Linux. My aim is to provide a complete X.25
15 I therefore decided to write the implementation such that as far as the
18 implementation of LAPB. Therefore the LAPB modules would be called by
22 To confuse matters a little, an 802.2 LLC implementation is also possible
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A DKconfig34 tristate "PCI bus implementation for Mellanox Technologies Switch ASICs"
39 This is PCI bus implementation for Mellanox Technologies Switch ASICs.
45 tristate "I2C bus implementation for Mellanox Technologies Switch ASICs"
49 This is I2C bus implementation for Mellanox Technologies Switch ASICs.
/linux/lib/crypto/
H A Dcurve25519.c5 * This is an implementation of the Curve25519 ECDH algorithm, using either an
6 * architecture-optimized implementation or a generic implementation. The
7 * generic implementation is either 32-bit, or 64-bit with 128-bit integers,
/linux/net/ipv4/
H A Dtcp_lp.c11 * the original TCP-LP implementation:
27 * Original implementation for 2.4.19:
74 * We get the idea from original TCP-LP implementation where only left those we
95 * Clone the handling from Vegas module implementation.
119 * Implementation of cong_avoid.
137 * implementation only guest it for once and use forever. in tcp_lp_remote_hz_estimator()
222 * Implementation or rtt_sample.
227 * Most ideas come from the original TCP-LP implementation. in tcp_lp_rtt_sample()
268 * Implementation of pkts_acked.
/linux/Documentation/crypto/
H A Dintro.rst43 The transformation implementation is an actual code or interface to
48 implementation. There can be multiple transformation objects associated
49 with a single transformation implementation. Each of those
52 consumer requests a transformation implementation. The consumer is then
/linux/include/uapi/linux/
H A Dsocket.h8 #define _K_SS_MAXSIZE 128 /* Implementation specific max size */
20 /* Following field(s) are implementation specific */
25 void *__align; /* implementation specific desired alignment */
/linux/Documentation/arch/arm/
H A Dvlocks.rst119 ARM implementation
122 The current ARM implementation [2] contains some optimisations beyond
130 In the ARM implementation, this means that we can use a single load
159 implementation uses a simple loop of word-sized loads for this
166 implementation.
171 implementation removes many of the barriers which would be required
/linux/include/crypto/internal/
H A Dkpp.h18 * @alg: The &struct kpp_alg implementation provided by the instance.
134 * kpp_instance_ctx() - Get a pointer to a &struct kpp_instance's implementation
138 * A KPP template implementation may allocate extra memory beyond the
142 * Return: A pointer to the implementation specific context data.
155 * Function registers an implementation of a key-agreement protocol primitive
168 * Function unregisters an implementation of a key-agreement protocol primitive
/linux/tools/perf/Documentation/
H A Dperf-arm-spe.txt32 This is chosen from a sample population, for SPE this is an IMPLEMENTATION DEFINED choice of all
81 indicates which particular cache was hit, but the meaning is implementation defined because
101 If an implementation samples micro-operations instead of instructions, the results of sampling must
178 bit 12-15 - IMPLEMENTATION DEFINED events (when implemented)
188 IMPLEMENTATION DEFINED event 24 (when implemented, only versions
191 implemented, or IMPLEMENTATION DEFINED event 25 (when implemented,
193 bit 26-31 - IMPLEMENTATION DEFINED events (only versions less than FEAT_SPEv1p4)
194 bit 48-63 - IMPLEMENTATION DEFINED events (when implemented)
196 For IMPLEMENTATION DEFINED bits, refer to the CPU TRM if these bits are
259 The arm_spe// and dummy:u events are implementation details and are expected to be empty.

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