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Searched full:ib1 (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/net/ethernet/mediatek/
H A Dmtk_ppe.c149 switch (mtk_get_ib1_pkt_type(eth, e->ib1)) { in mtk_ppe_hash_entry()
187 int type = mtk_get_ib1_pkt_type(eth, entry->ib1); in mtk_foe_entry_l2()
201 int type = mtk_get_ib1_pkt_type(eth, entry->ib1); in mtk_foe_entry_ib2()
226 entry->ib1 = val; in mtk_foe_entry_prepare()
237 entry->ib1 = val; in mtk_foe_entry_prepare()
302 int type = mtk_get_ib1_pkt_type(eth, entry->ib1); in mtk_foe_entry_set_ipv4_tuple()
342 int type = mtk_get_ib1_pkt_type(eth, entry->ib1); in mtk_foe_entry_set_ipv6_tuple()
377 if (!(entry->ib1 & mtk_get_ib1_vlan_layer_mask(eth))) in mtk_foe_entry_set_dsa()
378 entry->ib1 |= mtk_prep_ib1_vlan_layer(eth, 1); in mtk_foe_entry_set_dsa()
382 entry->ib1 &= ~mtk_get_ib1_vlan_tag_mask(eth); in mtk_foe_entry_set_dsa()
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H A Dmtk_ppe_debugfs.c93 state = FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1); in mtk_ppe_debugfs_foe_show()
102 type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); in mtk_ppe_debugfs_foe_show()
160 " vlan=%d,%d ib1=%08x ib2=%08x" in mtk_ppe_debugfs_foe_show()
163 l2->vlan1, l2->vlan2, entry->ib1, ib2, in mtk_ppe_debugfs_foe_show()
H A Dmtk_ppe.h240 u32 ib1; member
/linux/drivers/gpu/drm/panel/
H A Dpanel-arm-versatile.c10 * named "IB1" or "IB2" (Interface Board 1 & 2 respectively.) They
14 * - The IB1 is a passive board where the display connector defines a
128 * found on the Versatile AB IB1 connector or the Versatile
151 * found on the Versatile AB IB1 connector or the Versatile
/linux/Documentation/devicetree/bindings/arm/
H A Darm,versatile.yaml32 to an IB1 interface board for a touchscreen-type use case or an IB2
/linux/drivers/gpu/drm/amd/include/ivsrcid/gfx/
H A Dirqsrcs_gfx_10_1.h29 #define GFX_10_1__SRCID__CP_IB1_INTERRUPT_PKT 177 // B1 CP_INTERRUPT pkt in IB1
H A Dirqsrcs_gfx_9_0.h31 #define GFX_9_0__SRCID__CP_IB1_INTERRUPT_PKT 177 /* B1 CP_INTERRUPT pkt in IB1 */
/linux/drivers/gpu/drm/msm/
H A DKconfig52 that are run from RB instead of IB1. This essentially gives
/linux/drivers/infiniband/hw/qib/
H A Dqib_sd7220.c523 * RxEq and DDS in tables used by IBC in IB1.2 mode in qib_sd7220_init()
956 * Set the "negotiation" values for SERDES. These are used by the IB1.2
1187 * Set the Tx values normally modified by IBC in IB1.2 mode to default
1210 * Set the Rx values normally modified by IBC in IB1.2 mode to default
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Dadreno_common.xml144 <bitfield name="IB1" low="8" high="14" type="uint"/>
H A Dadreno_pm4.xml610 to loop any sequence of IB1 commands, but in practice they are
612 prefix, used to set per-bin state, and then the following IB1
2143 executed in an IB2 before the IB1 commands following
H A Da6xx.xml13 roughly corresponds to registers used in ib1 for Freedreno
18 the start of the command buffer (ib1), while "rp_blit" usage indicates that register
2320 b16..23 identifies where IB1 data starts (and RB data ends)
2321 b24..31 identifies where IB2 data starts (and IB1 data ends)
/linux/drivers/gpu/drm/msm/adreno/
H A Da3xx_gpu.c342 /* CP ROQ queue sizes (bytes) - RB:16, ST:16, IB1:32, IB2:64 */ in a3xx_hw_init()
H A Da5xx_gpu.c1245 …DRM_DEV_ERROR(dev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4… in a5xx_fault_detect_irq()
H A Da6xx_gpu.c1499 …"gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", in a6xx_fault_detect_irq()
/linux/drivers/gpu/drm/radeon/
H A Dr600.c4083 * 177 - CP_INT IB1
4288 case 177: /* CP_INT in IB1 */ in r600_irq_process()
H A Devergreen.c4858 case 177: /* CP_INT in IB1 */ in evergreen_irq_process()