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/linux/sound/soc/img/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "Imagination I2S Input Device Driver"
12 Say Y or M if you want to add support for I2S in driver for
13 Imagination Technologies I2S in device.
16 tristate "Imagination I2S Output Device Driver"
20 Say Y or M if you want to add support for I2S out driver for
21 Imagination Technologies I2S out device.
32 tristate "Imagination SPDIF Input Device Driver"
36 Say Y or M if you want to add support for SPDIF input driver for
37 Imagination Technologies SPDIF input device.
H A Dimg-i2s-in.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IMG I2S input controller driver
67 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_suspend() local
69 clk_disable_unprepare(i2s->clk_sys); in img_i2s_in_runtime_suspend()
76 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_resume() local
79 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_in_runtime_resume()
88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg) in img_i2s_in_writel() argument
90 writel(val, i2s->base + reg); in img_i2s_in_writel()
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg) in img_i2s_in_readl() argument
95 return readl(i2s->base + reg); in img_i2s_in_readl()
[all …]
/linux/sound/pci/ca0106/
H A Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
75 #define IPR_SPDIF_IN_USER 0x00004000 /* SPDIF input user data has 16 more bits */
82 #define IPR_GPI 0x00000080 /* General Purpose input changed */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
[all …]
/linux/sound/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
31 tristate "Tegra20 I2S interface"
35 Tegra20 I2S interface. You will also need to select the individual
53 tristate "Tegra30 I2S interface"
57 Tegra30 I2S interface. You will also need to select the individual
73 to interface with Pulse Density Modulation (PDM) input devices.
80 tristate "Tegra210 I2S module"
83 Config to enable the Inter-IC Sound (I2S) Controller which
84 implements full-duplex and bidirectional and single direction
[all …]
H A Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_i2s.c - Tegra210 I2S driver
33 * is required to select i2s4b for it to be functional for I2S
44 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
52 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
58 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
64 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
[all …]
/linux/include/media/drv-intf/
H A Dmsp3400.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 msp3400.h - definition for msp3400 inputs and outputs
22 There are 1) tuner inputs, 2) I2S inputs, 3) SCART inputs. You will have
23 to select which tuner input to use and which SCART input to use. The
24 selected tuner input, the selected SCART input and all I2S inputs go to
25 the DSP (the tuner input first goes through the demodulator).
28 have support for surround sound. It has several outputs: MAIN, AUX, I2S
29 and SCART1/2. Each output can select which DSP input to use. So the MAIN
30 output can select the tuner input while at the same time the SCART1 output
31 uses the I2S input.
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsil,sii9022.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
15 - items:
16 - enum:
17 - sil,sii9022-cpi # CEC Programming Interface
18 - sil,sii9022-tpi # Transmitter Programming Interface
19 - const: sil,sii9022
20 - const: sil,sii9022
[all …]
/linux/sound/pci/emu10k1/
H A Dp16v.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
11 /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers …
25 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
41 /* [0:1] Capture input 0 channel select. 0 = Capture output 0.
45 * [3:2] Capture input 1 channel select. 0 = Capture output 0.
49 * [5:4] Capture input 2 channel select. 0 = Capture output 0.
53 * [7:6] Capture input 3 channel select. 0 = Capture output 0.
57 * [9:8] Playback input 0 channel select. 0 = Play output 0.
61 * [11:10] Playback input 1 channel select. 0 = Play output 0.
[all …]
H A Dp17v.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8 /* Audigy2Value Tina (P17V) pointer-offset register set, */
12 /* 00 - 07: Not used */
16 /* 09 - 12: Not used */
20 /* 14 - 17: Not used */
24 /* 1b - 1f: Not used */
25 /* 20 - 2f: Not used */
26 /* 30 - 3b: Not used */
77 #define ADC_MUX_3 0x00000008 //Value to select Line-In at ADC Mux
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/linux/sound/soc/atmel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
31 in PDC mode configured using audio-graph-card in device-tree.
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
91 tristate "ASoC driver for the Axentia TSE-850"
98 Axentia TSE-850 with a PCM5142 codec.
101 tristate "Atmel ASoC driver for boards using I2S"
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
[all …]
H A Dnvidia,tegra210-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to-point serial
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
16 - Jon Hunter <jonathanh@nvidia.com>
[all …]
H A Dnxp,lpc3220-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nxp,lpc3220-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC32XX I2S Controller
10 The I2S controller in LPC32XX SoCs, ASoC DAI.
13 - J.M.B. Downing <jonathan.downing@nautel.com>
14 - Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
17 - $ref: dai-common.yaml#
22 - nxp,lpc3220-i2s
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H A Dcs35l34.txt5 - compatible : "cirrus,cs35l34"
7 - reg : the I2C address of the device for I2C.
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-vtge-millivolt : Boost Voltage Value. Configures the boost
17 - cirrus,boost-nanohenry: Inductor value for boost converter. The value is
22 - reset-gpios: GPIO used to reset the amplifier.
24 - interrupts : IRQ line info CS35L34.
25 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
28 - cirrus,boost-peak-milliamp : Boost converter peak current limit in mA. The
32 - cirrus,i2s-sdinloc : ADSP SDIN I2S channel location. Indicates whether the
[all …]
H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
[all …]
H A Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 include/dt-bindings/sound/madera.h
26 - $ref: dai-common.yaml#
29 '#sound-dai-cells':
36 A list of input mode settings for each input. A maximum
37 of 24 cells, with four cells per input in the order INnAL,
38 INnAR INnBL INnBR. For non-muxed inputs the first two cells
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3701.dtsi1 // SPDX-License-Identifier: GPL-2.0
20 i2s@2901000 {
24 i2s@2901100 {
28 i2s@2901300 {
32 i2s@2901500 {
41 dma-controller@2930000 {
45 interrupt-controller@2a40000 {
58 vcc-supply = <&vdd_1v8_hs>;
59 address-width = <8>;
62 read-only;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Daxs10x-i2s-pll-clock.txt1 Binding for the AXS10X I2S PLL clock
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible: shall be "snps,axs10x-i2s-pll-clock"
9 - reg : address and length of the I2S PLL register set.
10 - clocks: shall be the input parent clock phandle for the PLL.
11 - #clock-cells: from common clock binding; Should always be set to 0.
15 compatible = "fixed-clock";
16 clock-frequency = <27000000>;
17 #clock-cells = <0>;
21 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/linux/arch/arc/boot/dts/
H A Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/linux/sound/pci/aw2/
H A Daw2-saa7146.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Jean-Christian Hassler <jhassler@free.fr>
24 #include "aw2-saa7146.h"
26 #include "aw2-tsl.c"
28 #define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))
29 #define READREG(addr) readl(chip->base_addr + (addr))
38 /* chip-specific destructor */
48 chip->base_addr = NULL; in snd_aw2_saa7146_free()
81 chip->base_addr = pci_base_addr; in snd_aw2_saa7146_setup()
94 /* WS0_CTRL, WS0_SYNC: input TSL1, I2S */ in snd_aw2_saa7146_setup()
[all …]
/linux/sound/soc/samsung/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "Samsung I2S interface support"
25 tristate "SoC I2S Audio support for WM8994 on SMDK"
60 depends on INPUT && I2C
119 tristate "SoC I2S Audio support for WM5110 on TM2 board"
129 tristate "SoC I2S Audio support for WM8994 on Aries"
137 modem, and the Samsung I2S controller. Jack detection is done
139 and TV-Out path is also handled.
142 tristate "SoC I2S Audio support for Midas boards"
/linux/Documentation/devicetree/bindings/media/i2c/
H A Drda,rda5807.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
15 - rda,rda5807
21 power-supply: true
24 description: Use LNAN input port.
28 description: Use LNAP input port.
31 rda,analog-out:
35 rda,i2s-out:
[all …]
/linux/sound/pci/ice1712/
H A Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
59 #define VT1724_CFG_PRO_I2S 0x80 /* multitrack converter: I2S or AC'97 */
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
67 #define VT1724_CFG_I2S_OTHER 0x07 /* other I2S IDs */
72 #define VT1724_CFG_I2S_CHIPID 0x3c /* I2S chip ID */
73 #define VT1724_CFG_SPDIF_IN 0x02 /* S/PDIF input is present */
105 #define VT1724_REG_GPIO_DIRECTION 0x18 /* dword? (3 bytes) 0=input 1=output.
[all …]
/linux/sound/aoa/soundbus/i2sbus/
H A Dinterface.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2sbus driver -- interface register definitions
10 /* i2s bus control registers, at least what we know about them */
61 * - clock source
62 * - MClk divisor
63 * - SClk divisor
64 * - SClk master flag
65 * - serial format (sony, i2s 64x, i2s 32x, dav, silabs)
66 * - external sample frequency interrupt (don't understand)
67 * - external sample frequency
[all …]
/linux/include/sound/
H A Dmadera-pdata.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2016-2019 Cirrus Logic, Inc. and
24 * @max_channels_clocked: Maximum number of channels that I2S clocks will be
26 * where the I2S bus has multiple data lines.
28 * connected to DMICs on each input. A value of 0
35 * values. Two-dimensional array
37 * input in the order

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