Lines Matching +full:i2s +full:- +full:input
1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_i2s.c - Tegra210 I2S driver
33 * is required to select i2s4b for it to be functional for I2S
44 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
52 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
58 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
64 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
71 * Other I/O modules in AHUB can use i2s bclk as reference in tegra210_i2s_set_clock_rate()
72 * clock. Below sets sync input clock rate as per bclk, in tegra210_i2s_set_clock_rate()
73 * which can be used as input to other I/O modules. in tegra210_i2s_set_clock_rate()
75 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
78 "can't set I2S sync input rate %u, err = %d\n", in tegra210_i2s_set_clock_rate()
90 struct device *dev = compnt->dev; in tegra210_i2s_sw_reset()
91 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_sw_reset() local
108 /* Store CIF and I2S control values */ in tegra210_i2s_sw_reset()
109 regmap_read(i2s->regmap, cif_reg, &cif_ctrl); in tegra210_i2s_sw_reset()
110 regmap_read(i2s->regmap, stream_reg, &stream_ctrl); in tegra210_i2s_sw_reset()
111 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &i2s_ctrl); in tegra210_i2s_sw_reset()
114 regmap_update_bits(i2s->regmap, reset_reg, reset_mask, reset_en); in tegra210_i2s_sw_reset()
116 err = regmap_read_poll_timeout(i2s->regmap, reset_reg, val, in tegra210_i2s_sw_reset()
120 dev_err(dev, "timeout: failed to reset I2S for %s\n", in tegra210_i2s_sw_reset()
125 /* Restore CIF and I2S control values */ in tegra210_i2s_sw_reset()
126 regmap_write(i2s->regmap, cif_reg, cif_ctrl); in tegra210_i2s_sw_reset()
127 regmap_write(i2s->regmap, stream_reg, stream_ctrl); in tegra210_i2s_sw_reset()
128 regmap_write(i2s->regmap, TEGRA210_I2S_CTRL, i2s_ctrl); in tegra210_i2s_sw_reset()
136 struct snd_soc_component *compnt = snd_soc_dapm_to_component(w->dapm); in tegra210_i2s_init()
137 struct device *dev = compnt->dev; in tegra210_i2s_init()
138 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_init() local
143 switch (w->reg) { in tegra210_i2s_init()
153 return -EINVAL; in tegra210_i2s_init()
156 /* Ensure I2S is in disabled state before new session */ in tegra210_i2s_init()
157 err = regmap_read_poll_timeout(i2s->regmap, status_reg, val, in tegra210_i2s_init()
161 dev_err(dev, "timeout: previous I2S %s is still active\n", in tegra210_i2s_init()
171 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_runtime_suspend() local
173 regcache_cache_only(i2s->regmap, true); in tegra210_i2s_runtime_suspend()
174 regcache_mark_dirty(i2s->regmap); in tegra210_i2s_runtime_suspend()
176 clk_disable_unprepare(i2s->clk_i2s); in tegra210_i2s_runtime_suspend()
183 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_runtime_resume() local
186 err = clk_prepare_enable(i2s->clk_i2s); in tegra210_i2s_runtime_resume()
188 dev_err(dev, "failed to enable I2S bit clock, err: %d\n", err); in tegra210_i2s_runtime_resume()
192 regcache_cache_only(i2s->regmap, false); in tegra210_i2s_runtime_resume()
193 regcache_sync(i2s->regmap); in tegra210_i2s_runtime_resume()
198 static void tegra210_i2s_set_data_offset(struct tegra210_i2s *i2s, in tegra210_i2s_set_data_offset() argument
202 regmap_update_bits(i2s->regmap, TEGRA210_I2S_TX_CTRL, in tegra210_i2s_set_data_offset()
207 regmap_update_bits(i2s->regmap, TEGRA210_I2S_RX_CTRL, in tegra210_i2s_set_data_offset()
215 struct tegra210_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra210_i2s_set_fmt() local
227 return -EINVAL; in tegra210_i2s_set_fmt()
235 tegra210_i2s_set_data_offset(i2s, 1); in tegra210_i2s_set_fmt()
240 tegra210_i2s_set_data_offset(i2s, 0); in tegra210_i2s_set_fmt()
242 /* I2S mode has data offset of 1 */ in tegra210_i2s_set_fmt()
246 tegra210_i2s_set_data_offset(i2s, 1); in tegra210_i2s_set_fmt()
259 tegra210_i2s_set_data_offset(i2s, 0); in tegra210_i2s_set_fmt()
262 return -EINVAL; in tegra210_i2s_set_fmt()
282 return -EINVAL; in tegra210_i2s_set_fmt()
285 regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL, mask, val); in tegra210_i2s_set_fmt()
287 i2s->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; in tegra210_i2s_set_fmt()
296 struct tegra210_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra210_i2s_set_tdm_slot() local
299 i2s->tx_mask = (tx_mask > DEFAULT_I2S_SLOT_MASK) ? in tegra210_i2s_set_tdm_slot()
301 i2s->rx_mask = (rx_mask > DEFAULT_I2S_SLOT_MASK) ? in tegra210_i2s_set_tdm_slot()
311 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_get_loopback() local
313 ucontrol->value.integer.value[0] = i2s->loopback; in tegra210_i2s_get_loopback()
322 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_put_loopback() local
323 int value = ucontrol->value.integer.value[0]; in tegra210_i2s_put_loopback()
325 if (value == i2s->loopback) in tegra210_i2s_put_loopback()
328 i2s->loopback = value; in tegra210_i2s_put_loopback()
330 regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL, I2S_CTRL_LPBK_MASK, in tegra210_i2s_put_loopback()
331 i2s->loopback << I2S_CTRL_LPBK_SHIFT); in tegra210_i2s_put_loopback()
340 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_get_fsync_width() local
342 ucontrol->value.integer.value[0] = i2s->fsync_width; in tegra210_i2s_get_fsync_width()
351 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_put_fsync_width() local
352 int value = ucontrol->value.integer.value[0]; in tegra210_i2s_put_fsync_width()
354 if (value == i2s->fsync_width) in tegra210_i2s_put_fsync_width()
357 i2s->fsync_width = value; in tegra210_i2s_put_fsync_width()
367 regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL, in tegra210_i2s_put_fsync_width()
369 i2s->fsync_width << I2S_FSYNC_WIDTH_SHIFT); in tegra210_i2s_put_fsync_width()
378 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_cget_stereo_to_mono() local
380 ucontrol->value.enumerated.item[0] = i2s->stereo_to_mono[I2S_TX_PATH]; in tegra210_i2s_cget_stereo_to_mono()
389 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_cput_stereo_to_mono() local
390 unsigned int value = ucontrol->value.enumerated.item[0]; in tegra210_i2s_cput_stereo_to_mono()
392 if (value == i2s->stereo_to_mono[I2S_TX_PATH]) in tegra210_i2s_cput_stereo_to_mono()
395 i2s->stereo_to_mono[I2S_TX_PATH] = value; in tegra210_i2s_cput_stereo_to_mono()
404 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_cget_mono_to_stereo() local
406 ucontrol->value.enumerated.item[0] = i2s->mono_to_stereo[I2S_TX_PATH]; in tegra210_i2s_cget_mono_to_stereo()
415 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_cput_mono_to_stereo() local
416 unsigned int value = ucontrol->value.enumerated.item[0]; in tegra210_i2s_cput_mono_to_stereo()
418 if (value == i2s->mono_to_stereo[I2S_TX_PATH]) in tegra210_i2s_cput_mono_to_stereo()
421 i2s->mono_to_stereo[I2S_TX_PATH] = value; in tegra210_i2s_cput_mono_to_stereo()
430 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pget_stereo_to_mono() local
432 ucontrol->value.enumerated.item[0] = i2s->stereo_to_mono[I2S_RX_PATH]; in tegra210_i2s_pget_stereo_to_mono()
441 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pput_stereo_to_mono() local
442 unsigned int value = ucontrol->value.enumerated.item[0]; in tegra210_i2s_pput_stereo_to_mono()
444 if (value == i2s->stereo_to_mono[I2S_RX_PATH]) in tegra210_i2s_pput_stereo_to_mono()
447 i2s->stereo_to_mono[I2S_RX_PATH] = value; in tegra210_i2s_pput_stereo_to_mono()
456 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pget_mono_to_stereo() local
458 ucontrol->value.enumerated.item[0] = i2s->mono_to_stereo[I2S_RX_PATH]; in tegra210_i2s_pget_mono_to_stereo()
467 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pput_mono_to_stereo() local
468 unsigned int value = ucontrol->value.enumerated.item[0]; in tegra210_i2s_pput_mono_to_stereo()
470 if (value == i2s->mono_to_stereo[I2S_RX_PATH]) in tegra210_i2s_pput_mono_to_stereo()
473 i2s->mono_to_stereo[I2S_RX_PATH] = value; in tegra210_i2s_pput_mono_to_stereo()
482 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pget_fifo_th() local
484 ucontrol->value.integer.value[0] = i2s->rx_fifo_th; in tegra210_i2s_pget_fifo_th()
493 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_pput_fifo_th() local
494 int value = ucontrol->value.integer.value[0]; in tegra210_i2s_pput_fifo_th()
496 if (value == i2s->rx_fifo_th) in tegra210_i2s_pput_fifo_th()
499 i2s->rx_fifo_th = value; in tegra210_i2s_pput_fifo_th()
508 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_get_bclk_ratio() local
510 ucontrol->value.integer.value[0] = i2s->bclk_ratio; in tegra210_i2s_get_bclk_ratio()
519 struct tegra210_i2s *i2s = snd_soc_component_get_drvdata(compnt); in tegra210_i2s_put_bclk_ratio() local
520 int value = ucontrol->value.integer.value[0]; in tegra210_i2s_put_bclk_ratio()
522 if (value == i2s->bclk_ratio) in tegra210_i2s_put_bclk_ratio()
525 i2s->bclk_ratio = value; in tegra210_i2s_put_bclk_ratio()
533 struct tegra210_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra210_i2s_set_dai_bclk_ratio() local
535 i2s->bclk_ratio = ratio; in tegra210_i2s_set_dai_bclk_ratio()
545 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_timing_params() local
549 if (i2s->bclk_ratio) in tegra210_i2s_set_timing_params()
550 num_bclk *= i2s->bclk_ratio; in tegra210_i2s_set_timing_params()
552 if (i2s->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) in tegra210_i2s_set_timing_params()
553 tegra210_i2s_set_data_offset(i2s, num_bclk - sample_size); in tegra210_i2s_set_timing_params()
555 /* I2S bit clock rate */ in tegra210_i2s_set_timing_params()
560 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_timing_params()
565 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_timing_params()
576 bit_count = (bclk_rate / (srate * 2)) - 1; in tegra210_i2s_set_timing_params()
579 bit_count = (bclk_rate / srate) - 1; in tegra210_i2s_set_timing_params()
581 tegra210_i2s_set_slot_ctrl(i2s->regmap, channels, in tegra210_i2s_set_timing_params()
582 i2s->tx_mask, i2s->rx_mask); in tegra210_i2s_set_timing_params()
585 dev_err(dev, "invalid I2S frame format\n"); in tegra210_i2s_set_timing_params()
586 return -EINVAL; in tegra210_i2s_set_timing_params()
590 dev_err(dev, "invalid I2S channel bit count %u\n", bit_count); in tegra210_i2s_set_timing_params()
591 return -EINVAL; in tegra210_i2s_set_timing_params()
594 regmap_write(i2s->regmap, TEGRA210_I2S_TIMING, in tegra210_i2s_set_timing_params()
604 struct device *dev = dai->dev; in tegra210_i2s_hw_params()
605 struct tegra210_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra210_i2s_hw_params() local
614 dev_err(dev, "invalid I2S %d channel configuration\n", in tegra210_i2s_hw_params()
616 return -EINVAL; in tegra210_i2s_hw_params()
621 if (i2s->client_channels) in tegra210_i2s_hw_params()
622 cif_conf.client_ch = i2s->client_channels; in tegra210_i2s_hw_params()
637 return -EOPNOTSUPP; in tegra210_i2s_hw_params()
641 if (i2s->client_sample_format >= 0) in tegra210_i2s_hw_params()
642 sample_format = (snd_pcm_format_t)i2s->client_sample_format; in tegra210_i2s_hw_params()
645 * Format of the I2S for sending/receiving the audio in tegra210_i2s_hw_params()
666 return -EOPNOTSUPP; in tegra210_i2s_hw_params()
670 regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL, in tegra210_i2s_hw_params()
675 /* For playback I2S RX-CIF and for capture TX-CIF is used */ in tegra210_i2s_hw_params()
676 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in tegra210_i2s_hw_params()
681 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in tegra210_i2s_hw_params()
685 max_th = (I2S_RX_FIFO_DEPTH / cif_conf.audio_ch) - 1; in tegra210_i2s_hw_params()
687 if (i2s->rx_fifo_th > max_th) in tegra210_i2s_hw_params()
688 i2s->rx_fifo_th = max_th; in tegra210_i2s_hw_params()
690 cif_conf.threshold = i2s->rx_fifo_th; in tegra210_i2s_hw_params()
697 cif_conf.mono_conv = i2s->mono_to_stereo[path]; in tegra210_i2s_hw_params()
698 cif_conf.stereo_conv = i2s->stereo_to_mono[path]; in tegra210_i2s_hw_params()
700 tegra_set_cif(i2s->regmap, reg, &cif_conf); in tegra210_i2s_hw_params()
715 .name = "I2S-CIF",
717 .stream_name = "CIF-Playback",
726 .stream_name = "CIF-Capture",
736 .name = "I2S-DAP",
738 .stream_name = "DAP-Playback",
747 .stream_name = "DAP-Capture",
794 SOC_SINGLE_EXT("Playback FIFO Threshold", 0, 0, I2S_RX_FIFO_DEPTH - 1,
812 { "XBAR-Playback", NULL, "XBAR-TX" },
813 { "CIF-Playback", NULL, "XBAR-Playback" },
814 { "RX", NULL, "CIF-Playback" },
815 { "DAP-Playback", NULL, "RX" },
816 { "SPK", NULL, "DAP-Playback" },
818 { "XBAR-RX", NULL, "XBAR-Capture" },
819 { "XBAR-Capture", NULL, "CIF-Capture" },
820 { "CIF-Capture", NULL, "TX" },
821 { "TX", NULL, "DAP-Capture" },
822 { "DAP-Capture", NULL, "MIC" },
906 * CIF Port of DT I2S node which can help to perform this conversion.
909 * -----> ADMAIF -----------> CIF -------------> I2S ---->
913 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_parse_client_convert() local
918 ports = of_get_child_by_name(dev->of_node, "ports"); in tegra210_parse_client_convert()
920 ep = of_graph_get_endpoint_by_regs(ports, cif_port, -1); in tegra210_parse_client_convert()
929 i2s->client_channels = data.convert_channels; in tegra210_parse_client_convert()
932 i2s->client_sample_format = simple_util_get_sample_fmt(&data); in tegra210_parse_client_convert()
937 struct device *dev = &pdev->dev; in tegra210_i2s_probe()
938 struct tegra210_i2s *i2s; in tegra210_i2s_probe() local
942 i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL); in tegra210_i2s_probe()
943 if (!i2s) in tegra210_i2s_probe()
944 return -ENOMEM; in tegra210_i2s_probe()
946 i2s->rx_fifo_th = DEFAULT_I2S_RX_FIFO_THRESHOLD; in tegra210_i2s_probe()
947 i2s->tx_mask = DEFAULT_I2S_SLOT_MASK; in tegra210_i2s_probe()
948 i2s->rx_mask = DEFAULT_I2S_SLOT_MASK; in tegra210_i2s_probe()
949 i2s->loopback = false; in tegra210_i2s_probe()
950 i2s->client_sample_format = -EINVAL; in tegra210_i2s_probe()
952 dev_set_drvdata(dev, i2s); in tegra210_i2s_probe()
954 i2s->clk_i2s = devm_clk_get(dev, "i2s"); in tegra210_i2s_probe()
955 if (IS_ERR(i2s->clk_i2s)) { in tegra210_i2s_probe()
956 dev_err(dev, "can't retrieve I2S bit clock\n"); in tegra210_i2s_probe()
957 return PTR_ERR(i2s->clk_i2s); in tegra210_i2s_probe()
962 * requires input clock from current I2S instance, which is in tegra210_i2s_probe()
965 i2s->clk_sync_input = devm_clk_get(dev, "sync_input"); in tegra210_i2s_probe()
966 if (IS_ERR(i2s->clk_sync_input)) in tegra210_i2s_probe()
967 dev_dbg(dev, "can't retrieve I2S sync input clock\n"); in tegra210_i2s_probe()
973 i2s->regmap = devm_regmap_init_mmio(dev, regs, in tegra210_i2s_probe()
975 if (IS_ERR(i2s->regmap)) { in tegra210_i2s_probe()
977 return PTR_ERR(i2s->regmap); in tegra210_i2s_probe()
982 regcache_cache_only(i2s->regmap, true); in tegra210_i2s_probe()
988 dev_err(dev, "can't register I2S component, err: %d\n", err); in tegra210_i2s_probe()
999 pm_runtime_disable(&pdev->dev); in tegra210_i2s_remove()
1010 { .compatible = "nvidia,tegra210-i2s" },
1017 .name = "tegra210-i2s",
1027 MODULE_DESCRIPTION("Tegra210 ASoC I2S driver");