Searched full:hypertransport (Results 1 – 24 of 24) sorted by relevance
14 transforming interrupts from PCIe MSI into HyperTransport vectorized26 u32 value of the base of parent HyperTransport vector allocated34 u32 value of the number of parent HyperTransport vectors allocated
7 title: Loongson-3 HyperTransport Interrupt Controller17 interrupts from PCH PIC connected on HyperTransport bus.
14 transforming interrupts from on-chip devices into HyperTransport vectorized26 u32 value of the base of parent HyperTransport vector allocated
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
673 bool "Loongson3 HyperTransport PIC Controller"679 Support for the Loongson-3 HyperTransport PIC Controller.682 bool "Loongson HyperTransport Interrupt Vector Controller"687 Support for the Loongson HyperTransport Interrupt Vector Controller.
4 * Loongson HyperTransport Interrupt Vector support
9 HyperTransport card (model QHT7140).
2011 * HyperTransport can affect some user packet algorithms.
38 * CPU Interface and Hypertransport Link.207 * HyperTransport Link Registers677 /* Enable HyperTransport Link Error detection */689 /* Disable HyperTransport Link Error detection */699 /* Check for HyperTransport Link errors */767 * Add CPU Err detection and HyperTransport Link Err detection841 * and HyperTransport Link Err Detection
120 /* HyperTransport fabric size in bits 6:4 */ in pci_numachip_init()
304 on an AMD Opteron system with HyperTransport PCI-X Tunnel chipset.306 If your AMD Opteron system uses the AMD-8131 HyperTransport PCI-X Tunnel
93 * - lowest frequency must be >= interprocessor hypertransport link speed
223 /* U3 HyperTransport registers */
70 * - The APIC IDs differ from the HyperTransport node IDs. in srat_detect_node()
324 * - The APIC IDs differ from the HyperTransport node IDs in srat_detect_node()
410 * to the U4 own PCIe interface, not bridged through hypertransport. in iommu_init_early_dart()
366 /* Test if an interrupt is sourced from HyperTransport (used on broken U3s)
120 * and a HyperTransport bus which uses its own set of access216 * These versions of U3 HyperTransport config space access ops do not
2924 dump_HT_speeds("U3 HyperTransport", cfg, freq);
678 * pci_find_next_ht_capability - query a device's HyperTransport capabilities681 * @ht_cap: HyperTransport capability code697 * pci_find_ht_capability - query a device's HyperTransport capabilities699 * @ht_cap: HyperTransport capability code701 * Tell if a device supports a given HyperTransport capability.705 * which has a HyperTransport capability matching @ht_cap.
1170 * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide2744 * Go through the list of HyperTransport capabilities and return 1 if a HT2769 /* Check the HyperTransport MSI mapping to know whether MSI is enabled or not */3103 * a non-HyperTransport host bridge. Locate the host bridge. in __nv_msi_ht_cap_quirk()
152 * "ht" is hypertransport in of_bus_pci_match()
319 * (See AMD-8111 HyperTransport I/O Hub Data Sheet, in hpet_clkevt_set_state_periodic()
480 * HyperTransport Interface Registers (Section 8)