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/linux/drivers/mmc/host/
H A Dsdhci-pci-o2micro.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mmc/host.h>
18 #include "sdhci-pci.h"
84 static void sdhci_o2_wait_card_detect_stable(struct sdhci_host *host) in sdhci_o2_wait_card_detect_stable() argument
94 scratch32 = sdhci_readl(host, SDHCI_PRESENT_STATE); in sdhci_o2_wait_card_detect_stable()
101 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
102 sdhci_dumpregs(host); in sdhci_o2_wait_card_detect_stable()
109 static void sdhci_o2_enable_internal_clock(struct sdhci_host *host) in sdhci_o2_enable_internal_clock() argument
116 scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
118 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
[all …]
H A Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
21 #include "sdhci-uhs2.h"
306 static inline void gl9750_wt_on(struct sdhci_host *host) in gl9750_wt_on() argument
311 wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT); in gl9750_wt_on()
320 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on()
323 static inline void gl9750_wt_off(struct sdhci_host *host) in gl9750_wt_off() argument
328 wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT); in gl9750_wt_off()
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H A Dwbsd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
5 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
9 * Changes to the FIFO system should be done with extreme care since
10 * the hardware is full of bugs related to the FIFO. Known issues are:
12 * - FIFO size field in FSR is always zero.
14 * - FIFO interrupts tend not to work as they should. Interrupts are
17 * - On APIC systems the FIFO empty interrupt is sometimes lost.
26 #include <linux/dma-mapping.h>
30 #include <linux/mmc/host.h>
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/linux/drivers/mtd/nand/raw/
H A Dlpc32xx_slc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/dma-mapping.h>
30 #define LPC32XX_MODNAME "lpc32xx-nand"
86 #define SLCTAC_CLOCKS(c, n, s) (min_t(u32, DIV_ROUND_UP(c, n) - 1, 0xF) << s)
90 /* Write pulse width in clock cycles, 1 to 16 clocks */
92 /* Write hold time of control and data signals, 1 to 16 clocks */
94 /* Write setup time of control and data signals, 1 to 16 clocks */
98 /* Read pulse width in clock cycles, 1 to 16 clocks */
100 /* Read hold time of control and data signals, 1 to 16 clocks */
102 /* Read setup time of control and data signals, 1 to 16 clocks */
[all …]
H A Dmxc_nand.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
28 #define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
29 #define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
30 #define NFC_V1_V2_FLASH_ADDR (host->regs + 0x06)
31 #define NFC_V1_V2_FLASH_CMD (host->regs + 0x08)
32 #define NFC_V1_V2_CONFIG (host->regs + 0x0a)
33 #define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c)
34 #define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e)
35 #define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10)
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H A Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
57 * NAND chip structure
62 * @chip: base NAND chip structure
63 * @node: list node to add itself to host_list in
69 * @cs: chip select value for this chip
76 * chip
78 * @last_command: keeps track of last command on this chip. used
82 * ecc/non-ecc mode for the current nand flash
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H A Dlpc32xx_mlc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * - Read: Auto Decode
12 * - Write: Auto Encode
13 * - Tested Page Sizes: 2048, 4096
32 #include <linux/dma-mapping.h>
134 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_ecc()
135 return -ERANGE; in lpc32xx_ooblayout_ecc()
137 oobregion->offset = ((section + 1) * 16) - nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
138 oobregion->length = nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
148 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_free()
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H A Dsocrates_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * socrates_nand_write_buf - write buffer to chip
34 * @this: NAND chip object
36 * @len: number of bytes to write
42 struct socrates_nand_host *host = nand_get_controller_data(this); in socrates_nand_write_buf() local
45 out_be32(host->io_base, FPGA_NAND_ENABLE | in socrates_nand_write_buf()
52 * socrates_nand_read_buf - read chip data into buffer
53 * @this: NAND chip object
54 * @buf: buffer to store date
55 * @len: number of bytes to read
[all …]
H A Dhisi504_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright © 2012-2014 HiSilicon Technologies Co., Ltd.
21 #include <linux/dma-mapping.h>
126 struct nand_chip chip; member
144 static inline unsigned int hinfc_read(struct hinfc_host *host, unsigned int reg) in hinfc_read() argument
146 return readl(host->iobase + reg); in hinfc_read()
149 static inline void hinfc_write(struct hinfc_host *host, unsigned int value, in hinfc_write() argument
152 writel(value, host->iobase + reg); in hinfc_write()
155 static void wait_controller_finished(struct hinfc_host *host) in wait_controller_finished() argument
161 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
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/linux/drivers/spi/
H A Dspi-hisi-kunpeng.c1 // SPDX-License-Identifier: GPL-2.0-only
8 // This code is based on spi-dw-core.c.
120 u8 div_post; /* value from 0 to 255 */
121 u8 div_pre; /* value from 2 to 254 (even only!) */
165 struct spi_controller *host; in hisi_spi_debugfs_init() local
167 host = container_of(hs->dev, struct spi_controller, dev); in hisi_spi_debugfs_init()
168 snprintf(name, 32, "hisi_spi%d", host->bus_num); in hisi_spi_debugfs_init()
169 hs->debugfs = debugfs_create_dir(name, NULL); in hisi_spi_debugfs_init()
170 if (IS_ERR(hs->debugfs)) in hisi_spi_debugfs_init()
171 return -ENOMEM; in hisi_spi_debugfs_init()
[all …]
H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
69 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
70 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
71 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
72 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
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H A Dspi-sun4i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012 - 2014 Allwinner Tech
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
78 struct spi_controller *host; member
92 return readl(sspi->base_addr + reg); in sun4i_spi_read()
97 writel(value, sspi->base_addr + reg); in sun4i_spi_write()
138 while (len--) { in sun4i_spi_drain_fifo()
139 byte = readb(sspi->base_addr + SUN4I_RXDATA_REG); in sun4i_spi_drain_fifo()
140 if (sspi->rx_buf) in sun4i_spi_drain_fifo()
141 *sspi->rx_buf++ = byte; in sun4i_spi_drain_fifo()
[all …]
/linux/sound/pci/
H A Dcs4281.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
53 #define BA0_HISR 0x0000 /* Host Interrupt Status Register */
60 #define BA0_HISR_GPPI (1<<5) /* General Purpose Input (Primary chip) */
61 #define BA0_HISR_GPSI (1<<4) /* General Purpose Input (Secondary chip) */
67 #define BA0_HICR 0x0008 /* Host Interrup
495 snd_cs4281_pokeBA0(struct cs4281 * chip,unsigned long offset,unsigned int val) snd_cs4281_pokeBA0() argument
501 snd_cs4281_peekBA0(struct cs4281 * chip,unsigned long offset) snd_cs4281_peekBA0() argument
516 struct cs4281 *chip = ac97->private_data; snd_cs4281_ac97_write() local
555 struct cs4281 *chip = ac97->private_data; snd_cs4281_ac97_read() local
652 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_trigger() local
714 snd_cs4281_mode(struct cs4281 * chip,struct cs4281_dma * dma,struct snd_pcm_runtime * runtime,int capture,int src) snd_cs4281_mode() argument
783 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_playback_prepare() local
795 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_capture_prepare() local
807 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_pointer() local
871 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_playback_open() local
890 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_capture_open() local
939 snd_cs4281_pcm(struct cs4281 * chip,int device) snd_cs4281_pcm() argument
981 struct cs4281 *chip = snd_kcontrol_chip(kcontrol); snd_cs4281_get_volume() local
997 struct cs4281 *chip = snd_kcontrol_chip(kcontrol); snd_cs4281_put_volume() local
1045 struct cs4281 *chip = bus->private_data; snd_cs4281_mixer_free_ac97_bus() local
1051 struct cs4281 *chip = ac97->private_data; snd_cs4281_mixer_free_ac97() local
1058 snd_cs4281_mixer(struct cs4281 * chip) snd_cs4281_mixer() argument
1102 struct cs4281 *chip = entry->private_data; snd_cs4281_proc_read() local
1114 struct cs4281 *chip = entry->private_data; snd_cs4281_BA0_read() local
1126 struct cs4281 *chip = entry->private_data; snd_cs4281_BA1_read() local
1141 snd_cs4281_proc_init(struct cs4281 * chip) snd_cs4281_proc_init() argument
1168 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_trigger() local
1177 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_read() local
1188 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_cooked_read() local
1228 snd_cs4281_create_gameport(struct cs4281 * chip) snd_cs4281_create_gameport() argument
1256 snd_cs4281_free_gameport(struct cs4281 * chip) snd_cs4281_free_gameport() argument
1264 snd_cs4281_create_gameport(struct cs4281 * chip) snd_cs4281_create_gameport() argument
1265 snd_cs4281_free_gameport(struct cs4281 * chip) snd_cs4281_free_gameport() argument
1270 struct cs4281 *chip = card->private_data; snd_cs4281_free() local
1288 struct cs4281 *chip = card->private_data; snd_cs4281_create() local
1332 snd_cs4281_chip_init(struct cs4281 * chip) snd_cs4281_chip_init() argument
1572 snd_cs4281_midi_reset(struct cs4281 * chip) snd_cs4281_midi_reset() argument
1581 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_open() local
1597 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_close() local
1614 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_open() local
1631 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_close() local
1649 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_trigger() local
1669 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_trigger() local
1710 snd_cs4281_midi(struct cs4281 * chip,int device) snd_cs4281_midi() argument
1733 struct cs4281 *chip = dev_id; snd_cs4281_interrupt() local
1809 struct cs4281 *chip = opl3->private_data; snd_cs4281_opl3_command() local
1833 struct cs4281 *chip; __snd_cs4281_probe() local
1919 struct cs4281 *chip = card->private_data; cs4281_suspend() local
1960 struct cs4281 *chip = card->private_data; cs4281_resume() local
[all...]
/linux/drivers/ufs/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0+
3 # Kernel configuration file for the UFS host controller drivers.
5 # Copyright (C) 2011-2013 Samsung India Software Operations
15 This selects the PCI UFS Host Controller Interface. Select this if
16 you have UFS Host Controller with PCI Interface.
23 tristate "DesignWare pci support using a G210 Test Chip"
26 Synopsys Test Chip is a PHY for prototyping purposes.
34 This selects the UFS host controller support. Select this if
45 This selects the Cadence-specific additions to UFSHCD platform driver.
50 tristate "DesignWare platform support using a G210 Test Chip"
[all …]
/linux/Documentation/scsi/
H A D53c700.rst1 .. SPDX-License-Identifier: GPL-2.0
10 This driver supports the 53c700 and 53c700-66 chips. It also supports
12 does sync (-66 and 710 only), disconnects and tag command queueing.
14 Since the 53c700 must be interfaced to a bus, you need to wrapper the
18 The comments in the 53c700.[ch] files tell you which parts you need to
19 fill in to get the driver working.
33 Using the Chip Core Driver
36 In order to plumb the 53c700 chip core driver into a working SCSI
37 driver, you need to know three things about the way the chip is wired
44 Optionally, you may also need to know other things, like how to read
[all …]
/linux/include/linux/
H A Dti_wilink_st.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * To be included by the protocol stack drivers for
5 * Texas Instruments BT,FM and GPS combo chip drivers
6 * and also serves the sub-modules of the shared transport driver.
8 * Copyright (C) 2009-2010 Texas Instruments
18 * enum proto-type - The protocol on WiLink chips which share a
29 * struct st_proto_s - Per Protocol structure from BT/FM/GPS to ST
32 * @recv: the receiver callback pointing to a function in the
35 * @match_packet: reserved for future use, to make ST more generic
36 * @reg_complete_cb: callback handler pointing to a function in protocol
[all …]
/linux/drivers/ata/
H A Dsata_sx4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_sx4.c - Promise SATA
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2004 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
19 -------------------
21 The SX4 (PDC20621) chip features a single Host DMA (HDMA) copy
23 Data is copied to/from DIMM memory by the HDMA engine, before
24 handing off to one (or more) of the ATA engines. The ATA
27 The SX4 behaves like a PATA chip, with no SATA controls or
[all …]
/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_glue.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
10 * Copyright (C) 1998-2000 Gerard Roudier
13 * a port of the FreeBSD ncr driver to Linux-1.2.13.
17 * Stefan Esser <se@mi.Uni-Koeln.de>
25 *-----------------------------------------------------------------------------
62 MODULE_PARM_DESC(cmd_per_lun, "The maximum number of tags to use by default");
63 MODULE_PARM_DESC(burst, "Maximum burst. 0 to disable, 255 to read from registers");
[all …]
/linux/drivers/scsi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
29 If you want to use a SCSI hard disk, SCSI tape drive, SCSI CD-ROM or
31 the name of your SCSI host adapter (the card inside your computer
35 You also need to say Y here if you have a device which speaks
40 To compile this driver as a module, choose M here and read
79 comment "SCSI support type (disk, tape, CD-ROM)"
86 If you want to use SCSI hard disks, Fibre Channel disks,
89 the IOMEGA ZIP drive, say Y and read the SCSI-HOWTO,
90 the Disk-HOWTO and the Multi-Disk-HOWTO, available from
92 CD-ROMs.
[all …]
/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dnxp,88w8987-bt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
13 are used during FW download. To enable power save mode, the host
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
[all …]
H A Dbrcm,bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
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/linux/arch/powerpc/platforms/embedded6xx/
H A Dhlwd-pic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/powerpc/platforms/embedded6xx/hlwd-pic.c
9 #define DRV_MODULE_NAME "hlwd-pic"
19 #include "hlwd-pic.h"
38 * IRQ chip hooks.
81 .name = "hlwd-pic",
89 * IRQ host hooks.
98 irq_set_chip_data(virq, h->host_data); in hlwd_pic_map()
110 void __iomem *io_base = h->host_data; in __hlwd_pic_get_irq()
123 struct irq_chip *chip = irq_desc_get_chip(desc); in hlwd_pic_irq_cascade() local
[all …]
/linux/drivers/usb/isp1760/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
8 Say Y or M here if your system as an ISP1760/1763 USB host controller
9 or an ISP1761 USB dual-role controller.
12 This USB controller is usually attached to a non-DMA-Master
13 capable bus. NXP's eval kit brings this chip on PCI card
14 where the chip itself is behind a PLB to simulate such
17 To compile this driver as a module, choose M here: the
35 bool "Host only mode"
39 Select this if you want to use the ISP1760 in host mode only. The
47 Select this if you want to use the ISP1760 in peripheral mode only.
[all …]
/linux/drivers/memstick/host/
H A Djmb38x_ms.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * jmb38x_ms.c - JMicron jmb38x MemoryStick card reader
11 #include <linux/dma-mapping.h>
48 struct jmb38x_ms *chip; member
154 static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host, in jmb38x_ms_read_data() argument
159 while (host->io_pos && length) { in jmb38x_ms_read_data()
160 buf[off++] = host->io_word[0] & 0xff; in jmb38x_ms_read_data()
161 host->io_word[0] >>= 8; in jmb38x_ms_read_data()
162 length--; in jmb38x_ms_read_data()
163 host->io_pos--; in jmb38x_ms_read_data()
[all …]
/linux/Documentation/spi/
H A Dspi-summary.rst5 02-Feb-2012
8 ------------
10 link used to connect microcontrollers to sensors, memory, and peripherals.
11 It's a simple "de facto" standard, not complicated enough to acquire a
12 standardization body. SPI uses a host/target configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
19 doesn't cycle except when there is a data bit to shift. Not all data bits
22 SPI hosts use a fourth "chip select" line to activate a given SPI target
23 device, so those three signal wires may be connected to several chips
26 other signals, often including an interrupt to the host.
[all …]

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