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/linux/include/linux/
H A Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
17 * @dividend: unsigned 64bit dividend
18 * @divisor: unsigned 32bit divisor
19 * @remainder: pointer to unsigned 32bit remainder
23 * This is commonly provided by 32bit archs to provide an optimized 64bit
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
34 * @dividend: signed 64bit dividend
35 * @divisor: signed 32bit divisor
36 * @remainder: pointer to signed 32bit remainder
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
23 * ef4_dword_t) to be little-endian.
26 /* Lowest bit numbers and widths */
46 /* Low bit number of the specified field */
48 /* Bit width of the specified field */
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
23 * efx_dword_t) to be little-endian.
26 /* Lowest bit numbers and widths */
48 /* Low bit number of the specified field */
50 /* Bit width of the specified field */
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
23 * efx_dword_t) to be little-endian.
26 /* Lowest bit numbers and widths */
46 /* Low bit number of the specified field */
48 /* Bit width of the specified field */
[all …]
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix-i2c-txcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 /* Device ID High Byte Register */
27 #define SP_REGISTER_PD BIT(7)
28 #define SP_HDCP_PD BIT(5)
29 #define SP_AUDIO_PD BIT(4)
30 #define SP_VIDEO_PD BIT(3)
31 #define SP_LINK_PD BIT(2)
32 #define SP_TOTAL_PD BIT(1)
36 #define SP_MISC_RST BIT(7)
37 #define SP_VIDCAP_RST BIT(6)
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-z16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _V4L2-PIX-FMT-Z16:
11 16-bit depth data with distance values at each pixel
17 This is a 16-bit format, representing depth data. Each pixel is a
20 is stored in a 16-bit word in the little endian byte order.
28 .. flat-table::
29 :header-rows: 0
30 :stub-columns: 0
32 * - start + 0:
33 - Z\ :sub:`00low`
[all …]
H A Dpixfmt-tch-tu16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _V4L2-TCH-FMT-TU16:
12 16-bit unsigned little endian raw touch data
18 This format represents unsigned 16-bit data from a touch controller.
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
32 * - start + 0:
33 - R'\ :sub:`00low`
34 - R'\ :sub:`00high`
[all …]
H A Dpixfmt-srggb10.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _V4L2-PIX-FMT-SRGGB10:
5 .. _v4l2-pix-fmt-sbggr10:
6 .. _v4l2-pix-fmt-sgbrg10:
7 .. _v4l2-pix-fmt-sgrbg10:
17 10-bit Bayer formats expanded to 16 bits
24 sample. Each sample is stored in a 16-bit word, with 6 unused
25 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
32 Each cell is one byte, the 6 most significant bits in the high bytes
38 .. flat-table::
[all …]
H A Dpixfmt-srggb12.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _V4L2-PIX-FMT-SRGGB12:
5 .. _v4l2-pix-fmt-sbggr12:
6 .. _v4l2-pix-fmt-sgbrg12:
7 .. _v4l2-pix-fmt-sgrbg12:
18 12-bit Bayer formats expanded to 16 bits
25 colour. Each colour component is stored in a 16-bit word, with 4 unused
26 high bits filled with zeros. Each n-pixel row contains n/2 green samples
33 Each cell is one byte, the 4 most significant bits in the high bytes are
39 .. flat-table::
[all …]
H A Dpixfmt-srggb16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _V4L2-PIX-FMT-SRGGB16:
5 .. _v4l2-pix-fmt-sbggr16:
6 .. _v4l2-pix-fmt-sgbrg16:
7 .. _v4l2-pix-fmt-sgrbg16:
16 16-bit Bayer formats
24 sample. Each sample is stored in a 16-bit word. Each n-pixel row contains
33 .. flat-table::
34 :header-rows: 0
35 :stub-columns: 0
[all …]
/linux/lib/math/
H A Ddiv64.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on former do_div() implementation from asm-parisc/div64.h:
6 * Copyright (C) 1999 Hewlett-Packard Co
7 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
10 * Generic C version of 64bit/32bit division and modulo, with
11 * 64bit result and 32bit remainder.
16 * for some CPUs. __div64_32() can be overridden by linking arch-specific
28 /* Not needed on 64bit architectures */
37 uint32_t high = rem >> 32; in __div64_32() local
39 /* Reduce the thing a bit first */ in __div64_32()
[all …]
/linux/Documentation/hwmon/
H A Dadm9240.rst10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
[all …]
/linux/include/dt-bindings/pinctrl/
H A Dk210-fpioa.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 * kendryte-standalone-sdk/lib/drivers/include/fpioa.h
32 #define K210_PCF_UARTHS_RX 18 /* UART High speed Receiver */
33 #define K210_PCF_UARTHS_TX 19 /* UART High speed Transmitter */
38 #define K210_PCF_GPIOHS0 24 /* GPIO High speed 0 */
39 #define K210_PCF_GPIOHS1 25 /* GPIO High speed 1 */
40 #define K210_PCF_GPIOHS2 26 /* GPIO High speed 2 */
41 #define K210_PCF_GPIOHS3 27 /* GPIO High speed 3 */
42 #define K210_PCF_GPIOHS4 28 /* GPIO High speed 4 */
43 #define K210_PCF_GPIOHS5 29 /* GPIO High speed 5 */
[all …]
/linux/arch/mips/lib/
H A Dmulti3.c1 // SPDX-License-Identifier: GPL-2.0
14 /* multiply 64-bit values, low 64-bits returned */
23 /* multiply 64-bit unsigned values, high 64-bits of 128-bit result returned */
32 /* multiply 128-bit values, low 128-bits returned */
46 res.s.high = dmuhu(aa.s.low, bb.s.low); in __multi3()
47 res.s.high += dmulu(aa.s.high, bb.s.low); in __multi3()
48 res.s.high += dmulu(aa.s.low, bb.s.high); in __multi3()
54 #endif /* 64BIT && CPU_MIPSR6 && GCC7 */
/linux/drivers/thermal/
H A Dairoha_thermal.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #define EN7581_SENSE3_EN BIT(3)
24 #define EN7581_SENSE2_EN BIT(2)
25 #define EN7581_SENSE1_EN BIT(1)
26 #define EN7581_SENSE0_EN BIT(0)
28 /* period unit calculated in BUS clock * 256 scaling-up */
34 #define EN7581_STAGE3_INT_EN BIT(31)
35 #define EN7581_STAGE2_INT_EN BIT(30)
36 #define EN7581_STAGE1_INT_EN BIT(29)
37 #define EN7581_FILTER_INT_EN_3 BIT(28)
[all …]
/linux/arch/s390/include/asm/
H A Dctlreg.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define CR0_TRANSACTIONAL_EXECUTION_BIT (63 - 8)
14 #define CR0_CLOCK_COMPARATOR_SIGN_BIT (63 - 10)
15 #define CR0_CRYPTOGRAPHY_COUNTER_BIT (63 - 13)
16 #define CR0_PAI_EXTENSION_BIT (63 - 14)
17 #define CR0_CPUMF_EXTRACTION_AUTH_BIT (63 - 15)
18 #define CR0_WARNING_TRACK_BIT (63 - 30)
19 #define CR0_LOW_ADDRESS_PROTECTION_BIT (63 - 35)
20 #define CR0_FETCH_PROTECTION_OVERRIDE_BIT (63 - 38)
21 #define CR0_STORAGE_PROTECTION_OVERRIDE_BIT (63 - 39)
[all …]
/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
57 controlled by port 61h, bit 0, as illustrated in the following diagram::
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
[all …]
/linux/drivers/staging/sm750fb/
H A Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
22 * +-------------+-------------+-------------+-------------+
23 * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change|
34 * blank = no change, L = set bit LOW, H = set bit HIGH
37 * ---------------+---+---+---+---+
40 * ---------------+---+---+---+---+
43 * ---------------+---+---+---+---+
44 * Tx bit H SDA | | H | | |
46 * ---------------+---+---+---+---+
[all …]
/linux/arch/x86/include/asm/
H A Ddiv64.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * - modifies the 64-bit dividend _in_place_
17 * - returns the 32-bit remainder
27 __mod = n & (__base - 1); \
64 * gcc tends to zero extend 32bit values and do full 64bit maths.
71 u32 high, low; in mul_u32_u32() local
73 asm ("mull %[b]" : "=a" (low), "=d" (high) in mul_u32_u32()
76 return low | ((u64)high) << 32; in mul_u32_u32()
82 u32 high = a >> 32, low = a; in add_u64_u32() local
84 asm ("addl %[b], %[low]; adcl $0, %[high]" in add_u64_u32()
[all …]
H A Dasm.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 /* 32 bit */
27 /* 64 bit */
60 /* 32 bit */
79 /* 64 bit */
130 #include <asm/asm-offsets.h>
141 .long (from) - . ; \
142 .long (to) - . ; \
189 " .long (" #from ") - .\n" \
190 " .long (" #to ") - .\n" \
[all …]
/linux/arch/powerpc/lib/
H A Dstrlen_32.S1 /* SPDX-License-Identifier: GPL-2.0 */
19 * by subtracting 0x01010101, and seeing if any of the high bits of each
22 * significant), so it is 0x00 - 0x01 == 0xff. For all other
23 * byte values, either they have the high bit set initially, or when
24 * 1 is subtracted you get a value in the range 0x00-0x7f, none of which
25 * have their high bit set. The expression here is
26 * (x - 0x01010101) & ~x & 0x80808080), which gives 0x00000000 when
29 * byte to a true match due to carries. For little-endian this is
31 * we're interested in, but big-endian needs method 2 to find which
34 * calculating ~(((x & ~0x80808080) - 0x80808080 - 1) | x | ~0x80808080).
[all …]
/linux/tools/testing/selftests/powerpc/stringloops/
H A Dstrlen_32.S1 /* SPDX-License-Identifier: GPL-2.0 */
19 * by subtracting 0x01010101, and seeing if any of the high bits of each
22 * significant), so it is 0x00 - 0x01 == 0xff. For all other
23 * byte values, either they have the high bit set initially, or when
24 * 1 is subtracted you get a value in the range 0x00-0x7f, none of which
25 * have their high bit set. The expression here is
26 * (x - 0x01010101) & ~x & 0x80808080), which gives 0x00000000 when
29 * byte to a true match due to carries. For little-endian this is
31 * we're interested in, but big-endian needs method 2 to find which
34 * calculating ~(((x & ~0x80808080) - 0x80808080 - 1) | x | ~0x80808080).
[all …]
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Dadreno_pm4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <value name="VS_DEALLOC" value="0x00" variants="A2XX-A5XX"/>
10 <value name="PS_DEALLOC" value="0x01" variants="A2XX-A5XX"/>
11 <value name="VS_DONE_TS" value="0x02" variants="A2XX-A5XX"/>
12 <value name="PS_DONE_TS" value="0x03" variants="A2XX-A5XX"/>
19 <value name="CACHE_FLUSH" value="0x06" variants="A2XX-A4XX"/>
21 <value name="HLSQ_FLUSH" value="0x07" variants="A3XX-A4XX"/>
24 <value name="WRITE_PRIMITIVE_COUNTS" value="0x09" variants="A6XX-"/>
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
5 #include <linux/posix-clock.h>
27 #define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 BIT(I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)
39 CANT_DO_PINS = -1,
52 end = -2,
66 led_end = -2,
68 high, enumerator
83 {off, off, off, high, high, high, high},
84 {off, in_A, off, high, high, high, low},
[all …]
/linux/sound/soc/ti/
H A Ddavinci-mcasp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
100 * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management
103 #define MCASP_FREE BIT(0)
104 #define MCASP_SOFT BIT(1)
107 * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits
108 * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits
109 * DAVINCI_MCASP_PDOUT_REG - Pin output in GPIO mode
110 * DAVINCI_MCASP_PDSET_REG - Pin input in GPIO mode
122 * DAVINCI_MCASP_TXDITCTL_REG - Transmit DIT Control Register Bits
[all …]

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