Lines Matching +full:high +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
19 /* Device ID High Byte Register */
27 #define SP_REGISTER_PD BIT(7)
28 #define SP_HDCP_PD BIT(5)
29 #define SP_AUDIO_PD BIT(4)
30 #define SP_VIDEO_PD BIT(3)
31 #define SP_LINK_PD BIT(2)
32 #define SP_TOTAL_PD BIT(1)
36 #define SP_MISC_RST BIT(7)
37 #define SP_VIDCAP_RST BIT(6)
38 #define SP_VIDFIF_RST BIT(5)
39 #define SP_AUDFIF_RST BIT(4)
40 #define SP_AUDCAP_RST BIT(3)
41 #define SP_HDCP_RST BIT(2)
42 #define SP_SW_RST BIT(1)
43 #define SP_HW_RST BIT(0)
47 #define SP_AUX_RST BIT(2)
48 #define SP_SERDES_FIFO_RST BIT(1)
49 #define SP_I2C_REG_RST BIT(0)
53 #define SP_VIDEO_EN BIT(7)
54 #define SP_VIDEO_MUTE BIT(2)
55 #define SP_DE_GEN BIT(1)
56 #define SP_DEMUX BIT(0)
61 #define SP_IN_YC_BIT_SEL BIT(2)
68 #define SP_IN_D_RANGE BIT(7)
72 #define SP_HPD_OUT BIT(6)
76 #define SP_CSC_STD_SEL BIT(7)
77 #define SP_XVYCC_RNG_LMT BIT(6)
78 #define SP_RANGE_Y2R BIT(5)
79 #define SP_CSPACE_Y2R BIT(4)
80 #define SP_RGB_RNG_LMT BIT(3)
81 #define SP_Y_RNG_LMT BIT(2)
82 #define SP_RANGE_R2Y BIT(1)
83 #define SP_CSPACE_R2Y BIT(0)
87 #define SP_TEST_PATTERN_EN BIT(7)
88 #define SP_VIDEO_PROCESS_EN BIT(6)
89 #define SP_VID_US_MODE BIT(3)
90 #define SP_VID_DS_MODE BIT(2)
91 #define SP_UP_SAMPLE BIT(1)
92 #define SP_DOWN_SAMPLE BIT(0)
96 #define SP_VID_VRES_TH BIT(0)
101 /* Total Line Status High Byte Register */
107 /* Active Line Status High Byte Register */
122 /* Total Pixel Status High Byte Register */
128 /* Active Pixel Status High Byte Register */
134 /* Horizontal Front Porch Statys High Byte Register */
140 /* Horizontal SYNC Width Status High Byte Register */
146 /* Horizontal Back Porch Status High Byte Register */
152 /* Bit Control Specific Register */
155 #define SP_ENABLE_BIT_CTRL BIT(0)
176 #define SP_EXT_VUCP BIT(2)
177 #define SP_VBIT BIT(1)
178 #define SP_AUDIO_LAYOUT BIT(0)
200 #define SP_COMMON_INT_STATUS_BASE (0xf1 - 1)
205 #define SP_HDCP_AUTH_CHG BIT(1)
206 #define SP_HDCP_AUTH_DONE BIT(0)
208 #define SP_HDCP_LINK_CHECK_FAIL BIT(0)
212 #define SP_HPD_IRQ BIT(6)
213 #define SP_HPD_ESYNC_ERR BIT(4)
214 #define SP_HPD_CHG BIT(2)
215 #define SP_HPD_LOST BIT(1)
216 #define SP_HPD_PLUG BIT(0)
220 #define SP_TRAINING_FINISH BIT(5)
221 #define SP_POLLING_ERR BIT(4)
224 #define SP_COMMON_INT_MASK_BASE (0xf8 - 1)