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/linux/include/linux/
H A Dnetdev_features.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 NETIF_F_HW_VLAN_CTAG_TX_BIT, /* Transmit VLAN CTAG HW acceleration */
23 NETIF_F_HW_VLAN_CTAG_RX_BIT, /* Receive VLAN CTAG HW acceleration */
35 NETIF_F_GSO_ROBUST_BIT, /* ... ->SKB_GSO_DODGY */
46 NETIF_F_GSO_PARTIAL_BIT, /* ... Only segment inner-most L4
62 NETIF_F_NTUPLE_BIT, /* N-tupl
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/linux/drivers/net/ethernet/fungible/funeth/
H A Dfuneth_txrx.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
40 #define FUNETH_CQE_INFO_OFFSET (FUNETH_CQE_SIZE - sizeof(struct fun_cqe_info))
55 /* Per packet tailroom. Present only for 1-frag packets. */
84 u64 tx_tso; /* # of non-encapsulated TSO super-packets */
85 u64 tx_encap_tso; /* # of encapsulated TSO super-packets */
86 u64 tx_uso; /* # of non-encapsulated UDP LSO super-packets */
92 u64 tx_tls_pkts; /* # of Tx TLS packets offloaded to HW */
93 u64 tx_tls_bytes; /* Tx bytes of HW-handled TLS payload */
107 u32 mask; /* queue depth - 1 */
112 volatile __be64 *hw_wb; /* HW write-back location */
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/linux/net/ethtool/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
17 [NETIF_F_SG_BIT] = "tx-scatter-gather",
18 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",
19 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-i
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/linux/drivers/net/ethernet/qlogic/qede/
H A Dqede_fp.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
14 #include <net/gro.h>
35 /* In case lazy-allocation is allowed, postpone allocation until the in qede_alloc_rx_buffer()
39 if (allow_lazy && likely(rxq->filled_buffers > 12)) { in qede_alloc_rx_buffer()
40 rxq->filled_buffers--; in qede_alloc_rx_buffer()
46 return -ENOMEM; in qede_alloc_rx_buffer()
51 mapping = dma_map_page(rxq->dev, data, 0, in qede_alloc_rx_buffer()
52 PAGE_SIZE, rxq->data_direction); in qede_alloc_rx_buffer()
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H A Dqede.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
177 &(edev)->flags)
184 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
185 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
187 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
189 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
201 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
202 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_txrx_lib.c1 // SPDX-License-Identifier: GPL-2.0
13 * ice_release_rx_desc - Store the new tail and head values
19 u16 prev_ntu = rx_ring->next_to_use & ~0x7; in ice_release_rx_desc()
21 rx_ring->next_to_use = val; in ice_release_rx_desc()
24 rx_ring->next_to_alloc = val; in ice_release_rx_desc()
35 * applicable for weak-ordered memory model archs, in ice_release_rx_desc()
36 * such as IA-64). in ice_release_rx_desc()
39 writel(val, rx_ring->tai in ice_release_rx_desc()
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_cmn.h3 * Copyright (c) 2007-2013 Broadcom Corporation
32 extern int bnx2x_load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */
39 dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \
55 void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
64 void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
80 * bnx2x_send_unload_req - request unload mode from the MCP.
90 * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP.
98 * bnx2x_config_rss_pf - configure RSS parameters in a PF.
103 * @config_hash: re-configure RSS hash keys configuration
110 * bnx2x__init_func_obj - init function object
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H A Dbnx2x_cmn.c3 * Copyright (c) 2007-2013 Broadcom Corporation
28 #include <net/gro.h>
47 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi_cnic()
57 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi()
74 * bnx2x_move_fp - move content of the fastpath structure.
80 * Makes sure the contents of the bp->fp[to].napi is kept
88 struct bnx2x_fastpath *from_fp = &bp->fp[from]; in bnx2x_move_fp()
89 struct bnx2x_fastpath *to_fp = &bp->fp[to]; in bnx2x_move_fp()
90 struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from]; in bnx2x_move_fp()
91 struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to]; in bnx2x_move_fp()
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/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_main.c2 * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
88 /* Our HW-GRO implementation relies on "KSM Mkey" for in mlx5e_hw_gro_supported()
128 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_carrier()
137 if (up == netif_carrier_ok(priv->netdev)) in mlx5e_update_carrier()
138 netif_carrier_event(priv->netdev); in mlx5e_update_carrier()
140 netdev_info(priv->netdev, "Link up\n"); in mlx5e_update_carrier()
141 netif_carrier_on(priv->netdev); in mlx5e_update_carrier()
143 netdev_info(priv->netdev, "Link down\n"); in mlx5e_update_carrier()
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H A Den_ethtool.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
51 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_ethtool_get_drvinfo()
54 strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); in mlx5e_ethtool_get_drvinfo()
55 count = snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), in mlx5e_ethtool_get_drvinfo()
57 fw_rev_min(mdev), fw_rev_sub(mdev), mdev->board_id); in mlx5e_ethtool_get_drvinfo()
58 if (count >= sizeof(drvinfo->fw_version)) in mlx5e_ethtool_get_drvinfo()
59 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), in mlx5e_ethtool_get_drvinfo()
63 strscpy(drvinfo->bus_info, dev_name(mdev->device), in mlx5e_ethtool_get_drvinfo()
64 sizeof(drvinfo->bus_info)); in mlx5e_ethtool_get_drvinfo()
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H A Den_rx.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
41 #include <net/gro.h>
93 struct mlx5e_cq_decomp *cqd = &rq->cqd; in mlx5e_read_enhanced_title_slot()
94 struct mlx5_cqe64 *title = &cqd->title; in mlx5e_read_enhanced_title_slot()
98 if (likely(test_bit(MLX5E_RQ_STATE_MINI_CQE_HW_STRIDX, &rq->state))) in mlx5e_read_enhanced_title_slot()
101 if (rq->wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) in mlx5e_read_enhanced_title_slot()
102 cqd->wqe_counter = mpwrq_get_cqe_stride_index(title) + in mlx5e_read_enhanced_title_slot()
105 cqd->wqe_counter = in mlx5e_read_enhanced_title_slot()
106 mlx5_wq_cyc_ctr2ix(&rq->wqe.wq, be16_to_cpu(title->wqe_counter) + 1); in mlx5e_read_enhanced_title_slot()
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/linux/Documentation/networking/
H A Dtls-offload.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 For details regarding the user-facing interface refer to the TLS
18 * Software crypto mode (``TLS_SW``) - CPU handles the cryptography.
24 * Packet-based NIC offload mode (``TLS_HW``) - the NIC handles crypto
28 (``ethtool`` flags ``tls-hw-tx-offload`` and ``tls-hw-rx-offload``).
29 * Full TCP NIC offload mode (``TLS_HW_RECORD``) - mode of operation where
33 abilities or QoS and packet scheduling (``ethtool`` flag ``tls-hw-record``).
36 offload opt-in or opt-out on per-connection basis is not currently supported.
39 --
52 --
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/linux/net/core/
H A Ddev.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Florian la Roche <rzsfl@rz.uni-sb.de>
19 * D.J. Barrow : Fixed bug where dev->refcnt gets set
64 * Pekka Riikonen : Netdev boot-time settings code
66 * indefinitely on dev->refcnt
67 * J Hadi Salim : - Backlo
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/linux/drivers/net/ethernet/hisilicon/hns3/
H A Dhns3_enet.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
20 #include <net/gro.h>
55 static int debug = -1;
80 /* hns3_pci_tbl - PCI Device ID Table
388 napi_schedule_irqoff(&tqp_vector->napi); in hns3_irq_handle()
389 tqp_vector->event_cn in hns3_irq_handle()
2602 u8 hw = mqprio_qopt->qopt.hw; hns3_setup_tc() local
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H A Dhnae3.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 // Copyright (c) 2016-2017 Hisilicon Limited.
74 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
77 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
111 test_bit(HNAE3_DEV_SUPPORT_FD_B, (ae_dev)->caps)
114 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (ae_dev)->cap
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/linux/drivers/net/wireless/ath/wil6210/
H A Dtxrx.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
25 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no");
29 MODULE_PARM_DESC(rx_large_buf, " allocate 8KB RX buffers, default - no");
39 /* wil_ring_wmark_low - low watermark for available descriptor space */
42 return ring->size / 8; in wil_ring_wmark_low()
45 /* wil_ring_wmark_high - high watermark for available descriptor space */
48 return ring->size / 4; in wil_ring_wmark_high()
71 struct wil_ring *vring = &wil->ring_tx[i]; in wil_is_tx_idle()
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/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dsge.c2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
43 #include <linux/dma-mapping.h>
63 * 64-bit PCI DMA addresses.
106 ETHTXQ_MAX_SGL_LEN = ((3 * (ETHTXQ_MAX_FRAGS-1))/2 +
107 ((ETHTXQ_MAX_FRAGS-1) & 1) +
140 * in-line room in skb's to accommodate pulling in RX_PULL_LEN bytes
189 * get_buf_addr - return DMA buffer address of software descriptor
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/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_main.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
38 /* hclgevf_cmd_send - send command to command queue
39 * @hw: pointer to the hw struct
46 int hclgevf_cmd_send(struct hclgevf_hw *hw, struct hclge_desc *desc, int num) in hclgevf_cmd_send() argument
48 return hclge_comm_cmd_send(&hw->hw, desc, num); in hclgevf_cmd_send()
51 static void hclgevf_trace_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc, in hclgevf_trace_cmd_send() argument
56 trace_hclge_vf_cmd_send(hw, desc, 0, num); in hclgevf_trace_cmd_send()
62 trace_hclge_vf_cmd_send(hw, &desc[i], i, num); in hclgevf_trace_cmd_send()
65 static void hclgevf_trace_cmd_get(struct hclge_comm_hw *hw, struct hclge_desc *desc, in hclgevf_trace_cmd_get() argument
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/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A Dother.json11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
36 … scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro"
113 …to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that re…
125 …"BriefDescription": "Conditional Branch Completed on BR0 (1st branch in group) in which the HW pre…
131 …"BriefDescription": "Conditional Branch Completed on BR1 (2nd branch in group) in which the HW pre…
161 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
167 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
197 …ional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set thi…
203 …ional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set thi…
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/linux/net/ipv4/
H A Dip_output.c1 // SPDX-License-Identifier: GPL-2.0-only
39 * silently drop skb instead of failing with -EPERM.
41 * Hirokazu Takahashi: HW checksumming for outgoing UDP
81 #include <linux/bpf-cgroup.h>
97 iph->check = 0; in ip_send_check()
98 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); in ip_send_check()
108 iph_set_totlen(iph, skb->len); in __ip_local_out()
118 skb->protocol = htons(ETH_P_IP); in __ip_local_out()
140 int ttl = READ_ONCE(inet->uc_ttl); in ip_select_ttl()
161 skb_push(skb, sizeof(struct iphdr) + (opt ? opt->opt.optlen : 0)); in ip_build_and_send_pkt()
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H A Dudp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 * Fred Van Kempen : Net2e support for sk->broadcast.
63 * bound-to-device socket
64 * Hirokazu Takahashi : HW checksumming for outgoing UDP
77 #include <linux/bpf-cgrou
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/linux/drivers/net/ethernet/emulex/benet/
H A Dbe_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005 - 2016 Broadcom
7 * linux-drivers@emulex.com
38 /* Per-module error detection/recovery workq shared across all functions.
146 struct be_dma_mem *mem = &q->dma_mem; in be_queue_free()
148 if (mem->va) { in be_queue_free()
149 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va, in be_queue_free()
150 mem->dma); in be_queue_free()
151 mem->va = NULL; in be_queue_free()
158 struct be_dma_mem *mem = &q->dma_mem; in be_queue_alloc()
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/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
326 { OUTER_DST_MAC, 48, KEY_OPT_MAC, -1, -1 },
327 { OUTER_SRC_MAC, 48, KEY_OPT_MAC, -1, -1 },
328 { OUTER_VLAN_TAG_FST, 16, KEY_OPT_LE16, -1, -1 },
329 { OUTER_VLAN_TAG_SEC, 16, KEY_OPT_LE16, -1, -1 },
330 { OUTER_ETH_TYPE, 16, KEY_OPT_LE16, -1, -1 },
331 { OUTER_L2_RSV, 16, KEY_OPT_LE16, -1, -1 },
332 { OUTER_IP_TOS, 8, KEY_OPT_U8, -1, -1 },
333 { OUTER_IP_PROTO, 8, KEY_OPT_U8, -1, -1 },
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/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.c1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2019 Broadcom Limited
25 #include <linux/dma-mapping.h>
40 #include <net/gro.h>
60 #include <linux/pci-tph.h>
95 [BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
96 [BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
97 [BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
98 [BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
126 #define FW4_CFNAME "cxgb4/t4-config.txt"
127 #define FW5_CFNAME "cxgb4/t5-config.txt"
128 #define FW6_CFNAME "cxgb4/t6-config.txt"
144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
158 * offset by 2 bytes in order to have the IP headers line up on 4-byt
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