Lines Matching +full:hw +full:- +full:gro
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
177 &(edev)->flags)
184 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
185 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
187 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
189 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
201 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
202 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
204 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx)
217 * minimal alignment shift 6 is optimal for 57xxx HW performance
221 * at the end of skb->data, to avoid wasting a full cache line.
222 * This reduces memory use (skb->truesize).
291 * skb are built only after the frame was DMA-ed.
309 * buffer on the rx-bd-ring when we receive TPA_START. We don't want
311 * consumer buffer in the rx-chain since FW may still be writing to it
357 /* GRO */
414 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \
417 #define QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx) ((edev)->fp_num_rx + \
421 (txq)->cos) + (txq)->index)
423 (&((edev)->fp_array[QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx)].txq \
425 #define QEDE_FP_TC0_TXQ(fp) (&((fp)->txq[0]))
443 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
444 le32_to_cpu((bd)->addr.lo))
447 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
448 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
449 (bd)->nbytes = cpu_to_le16(len); \
451 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
478 #define DP_NAME(edev) netdev_name((edev)->ndev)
590 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
593 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1)
597 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
605 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
607 for ((var) = 0; (var) < (edev)->dev_info.num_tc; (var)++)