Home
last modified time | relevance | path

Searched full:hs400 (Results 1 – 25 of 79) sorted by relevance

1234

/linux/Documentation/devicetree/bindings/mmc/
H A Dnvidia,tegra20-sdhci.yaml100 The DQS trim values are only used on controllers which support HS400
101 timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
109 description: Specify DQS trim value for HS400 timing.
136 nvidia,pad-autocal-pull-down-offset-hs400:
137 description: Specify drive strength calibration offsets for HS400 mode.
158 and HS400 timing specific values are used in corresponding modes if
171 nvidia,pad-autocal-pull-up-offset-hs400:
172 description: Specify drive strength calibration offsets for HS400 mode.
H A Dsprd,sdhci-r11.yaml99 mmc-hs400-enhanced-strobe;
100 mmc-hs400-1_8v;
109 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
H A Dsdhci-am654.yaml121 ti,otap-del-sel-hs400:
122 description: Output tap delay for eMMC HS400 timing
190 description: strobe select delay for HS400 speed mode.
236 ti,otap-del-sel-hs400 = <0x0>;
H A Dbrcm,sdhci-brcmstb.yaml109 mmc-hs400-1_8v;
110 mmc-hs400-enhanced-strobe;
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7885-jackpotlte.dts67 mmc-hs400-1_8v;
70 mmc-hs400-enhanced-strobe;
77 samsung,dw-mshc-hs400-timing = <0 2>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso19 mmc-hs400-1_8v;
20 hs400-ds-delay = <0x14014>;
H A Dmt6795-sony-xperia-m5.dts215 mediatek,latch-ck = <0x14>; /* hs400 */
217 mediatek,hs400-cmd-int-delay = <1>;
218 mediatek,hs400-ds-dly3 = <0x1a>;
H A Dmt7986a-rfb.dts102 mmc-hs400-1_8v;
103 hs400-ds-delay = <0x14014>;
H A Dmt8183-evb.dts109 mmc-hs400-1_8v;
113 hs400-ds-delay = <0x12814>;
/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574-rdp418.dts24 mmc-hs400-1_8v;
25 mmc-hs400-enhanced-strobe;
H A Dsdm660-xiaomi-lavender.dts397 mmc-hs400-1_8v;
398 mmc-hs400-enhanced-strobe;
/linux/drivers/mmc/host/
H A Drenesas_sdhi.h19 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
20 u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
H A Dsdhci-xenon-phy.c348 * and before HS400 data strobe setting.
466 /* Set HS400 Data Strobe and Enhanced Strobe */
479 dev_dbg(mmc_dev(host->mmc), "starts HS400 strobe delay adjustment\n"); in xenon_emmc_phy_strobe_delay_adj()
489 * 1. card is in HS400 mode and in xenon_emmc_phy_strobe_delay_adj()
668 /* Hardware team recommend a value for HS400 */ in xenon_emmc_phy_set()
766 * HS400 set Data Strobe and Enhanced Strobe if it is supported.
H A Dsdhci-msm.c495 * HS400/HS200 timing mode).
845 * Select HS400 mode using the HC_SELECT_IN from VENDOR SPEC in msm_hc_select_hs400()
884 * eMMC specific HS200/HS400 doesn't have their respective modes
888 * HS400 - This involves multiple configurations
890 * Then when switching to DDR @ 400MHz (HS400) we use
896 * HS400 - divided clock (free running MCLK/2)
922 * Retuning in HS400 (DDR mode) will fail, just reset the in sdhci_msm_cdclp533_calibration()
1102 * Retuning in HS400 (DDR mode) will fail, just reset the in sdhci_msm_hs400_dll_calibration()
1137 * Tuning is required for SDR104, HS200 and HS400 cards and in sdhci_msm_is_tuning_needed()
1216 * HS400 settings. in sdhci_msm_execute_tuning()
[all …]
H A Drenesas_sdhi_core.c143 /* HS400 with 4TAP needs different clock settings */ in renesas_sdhi_clk_update()
391 /* Set HS400 mode */ in renesas_sdhi_hs400_complete()
538 /* Reset HS400 mode */ in renesas_sdhi_reset_hs400_mode()
742 * With HS400, the DAT signal is based on DS, not CLK. in renesas_sdhi_manual_correction()
806 * Skip checking SCC errors when running on 4 taps in HS400 mode as in renesas_sdhi_check_scc_error()
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi151 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
161 mmc-hs400-enhanced-strobe;
162 mmc-hs400-1_8v;
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77980a-condor-i.dts18 mmc-hs400-1_8v;
H A Dr8a774e1-hihope-rzg2h.dts40 mmc-hs400-1_8v;
H A Dr8a774b1-hihope-rzg2n.dts40 mmc-hs400-1_8v;
H A Dr8a774b1-hihope-rzg2n-rev2.dts40 mmc-hs400-1_8v;
/linux/drivers/mmc/core/
H A Dmmc.c1166 * HS400 mode requires 8-bit bus width in mmc_select_hs400()
1208 pr_err("%s: switch to bus width for hs400 failed, err:%d\n", in mmc_select_hs400()
1213 /* Switch card to HS400 */ in mmc_select_hs400()
1221 pr_err("%s: switch to hs400 failed, err:%d\n", in mmc_select_hs400()
1226 /* Set host controller to HS400 timing and frequency */ in mmc_select_hs400()
1269 /* Switch HS400 to HS DDR */ in mmc_hs400_to_hs200()
1321 /* Prepare tuning for HS400 mode. */ in mmc_hs400_to_hs200()
1415 /* Switch card to HS400 */ in mmc_select_hs400es()
1428 /* Set host controller to HS400 timing and frequency */ in mmc_select_hs400es()
1570 * conditions for HS200 and HS400, which sends CMD21 to the device.
[all …]
H A Ddebugfs.c155 "mmc HS400 enhanced strobe" : "mmc HS400"; in mmc_ios_show()
H A Dbus.c359 speed_mode = "HS400 Enhanced strobe "; in mmc_add_card()
361 speed_mode = "HS400 "; in mmc_add_card()
/linux/arch/arm64/boot/dts/freescale/
H A Ds32g274a-rdb2.dts49 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
H A Dfsl-lx2162a-sr-som.dtsi28 mmc-hs400-1_8v;

1234