| /linux/drivers/soc/rockchip/ |
| H A D | grf.c | 162 .compatible = "rockchip,rk3036-grf",
165 .compatible = "rockchip,rk3128-grf",
168 .compatible = "rockchip,rk3228-grf",
171 .compatible = "rockchip,rk3288-grf",
174 .compatible = "rockchip,rk3328-grf",
177 .compatible = "rockchip,rk3368-grf",
180 .compatible = "rockchip,rk3399-grf",
183 .compatible = "rockchip,rk3566-pipe-grf",
186 .compatible = "rockchip,rk3576-sys-grf",
189 .compatible = "rockchip,rk3576-ioc-grf",
[all …]
|
| H A D | io-domain.c | 80 struct regmap *grf; member
102 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0); in rk3568_iodomain_write()
103 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1); in rk3568_iodomain_write()
117 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL0, val0); in rk3568_iodomain_write()
118 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1); in rk3568_iodomain_write()
141 ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); in rockchip_iodomain_write()
143 dev_err(iod->dev, "Couldn't write to GRF\n"); in rockchip_iodomain_write()
212 ret = regmap_write(iod->grf, PX30_IO_VSEL, val); in px30_iodomain_init()
231 ret = regmap_write(iod->grf, RK3288_SOC_CON2, val); in rk3288_iodomain_init()
250 ret = regmap_write(iod->grf, RK3308_SOC_CON0, val); in rk3308_iodomain_init()
[all …]
|
| /linux/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip-vop2.yaml | 55 - description: Peripheral(vop grf/dsi) clock.
68 rockchip,grf:
71 Phandle to GRF regs used for control the polarity of dclk/hsync/vsync of DPI,
74 rockchip,vo1-grf:
77 Phandle to VO GRF regs used for control the polarity of dclk/hsync/vsync of hdmi
80 rockchip,vop-grf:
83 Phandle to VOP GRF regs used for control data path between vopr and hdmi/edp.
88 Phandle to PMU GRF used for query vop memory bisr status on rk3588.
139 - rockchip,grf
140 - rockchip,vo1-grf
[all …]
|
| H A D | cdn-dp-rockchip.txt | 12 Required elements: "core-clk" "pclk" "spdif" "grf"
22 - rockchip,grf: this soc should set GRF regs, so need get grf here.
43 clock-names = "core-clk", "pclk", "spdif", "grf";
51 rockchip,grf = <&grf>;
|
| H A D | rockchip,dw-hdmi.yaml | 51 - description: Power for GRF IO
62 - grf
66 - grf
115 rockchip,grf:
118 phandle to the GRF to mux vopl/vopb.
131 - rockchip,grf
151 rockchip,grf = <&grf>;
|
| H A D | rockchip,analogix-dp.yaml | 28 - const: grf
39 rockchip,grf:
42 This SoC makes use of GRF regs.
50 - rockchip,grf
72 rockchip,grf = <&grf>;
|
| H A D | rockchip,dw-mipi-dsi.yaml | 39 - const: grf
42 rockchip,grf:
45 This SoC uses GRF regs to switch between vopl/vopb.
71 - rockchip,grf
141 rockchip,grf = <&grf>;
|
| H A D | rockchip,rk3066-hdmi.yaml | 35 rockchip,grf:
38 This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
71 - rockchip,grf
91 rockchip,grf = <&grf>;
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | phy-rockchip-naneng-combphy.yaml | 65 rockchip,pipe-grf:
68 Some additional phy settings are accessed through GRF regs.
70 rockchip,pipe-phy-grf:
73 Some additional pipe settings are accessed through GRF regs.
84 - rockchip,pipe-grf
85 - rockchip,pipe-phy-grf
121 compatible = "rockchip,rk3568-pipe-grf", "syscon";
126 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
140 rockchip,pipe-grf = <&pipegrf>;
141 rockchip,pipe-phy-grf
[all...] |
| H A D | rockchip-inno-csi-dphy.yaml | 49 rockchip,grf:
52 Some additional phy settings are access through GRF regs.
63 - rockchip,grf
79 rockchip,grf = <&grf>;
|
| H A D | rockchip-mipi-dphy-rx0.yaml | 31 - const: grf
54 * should be a child of the GRF.
56 * grf: syscon@ff770000 {
57 * compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
70 clock-names = "dphy-ref", "dphy-cfg", "grf";
|
| H A D | phy-rockchip-typec.txt | 7 - rockchip,grf : phandle to the syscon managing the "general
41 rockchip,grf = <&grf>;
65 rockchip,grf = <&grf>;
|
| /linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-usb.c | 55 int (*init_usb_uart)(struct regmap *grf,
323 static int __init rockchip_init_usb_uart_common(struct regmap *grf, in rockchip_init_usb_uart_common() argument
341 ret = regmap_write(grf, regoffs + UOC_CON0, val); in rockchip_init_usb_uart_common()
347 ret = regmap_write(grf, regoffs + UOC_CON2, val); in rockchip_init_usb_uart_common()
358 ret = regmap_write(grf, UOC_CON3, val); in rockchip_init_usb_uart_common()
373 static int __init rk3188_init_usb_uart(struct regmap *grf, in rk3188_init_usb_uart() argument
379 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3188_init_usb_uart()
387 ret = regmap_write(grf, RK3188_UOC0_CON0, val); in rk3188_init_usb_uart()
423 static int __init rk3288_init_usb_uart(struct regmap *grf, in rk3288_init_usb_uart() argument
429 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3288_init_usb_uart()
[all …]
|
| H A D | phy-rockchip-dp.c | 28 struct regmap *grf; member
38 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
50 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
107 dp->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_dp_phy_probe()
108 if (IS_ERR(dp->grf)) { in rockchip_dp_phy_probe()
110 return PTR_ERR(dp->grf); in rockchip_dp_phy_probe()
113 ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER | in rockchip_dp_phy_probe()
116 dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret); in rockchip_dp_phy_probe()
|
| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | rockchip,rk3328-grf-gpio.yaml | 4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
10 The Rockchip RK3328 General Register File (GRF) outputs only the
14 The GPIO node should be declared as the child of the GRF node.
30 const: rockchip,rk3328-grf-gpio
47 compatible = "rockchip,rk3328-grf-gpio";
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | rockchip,px30-cru.yaml | 57 rockchip,grf:
60 Phandle to the syscon managing the "general register files" (GRF),
106 rockchip,grf = <&grf>;
116 rockchip,grf = <&grf>;
|
| H A D | rockchip,rv1126-cru.yaml | 39 rockchip,grf:
42 Phandle to the syscon managing the "general register files" (GRF),
59 rockchip,grf = <&grf>;
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | rockchip,rk3328-codec.yaml | 32 rockchip,grf:
35 The phandle of the syscon node for the GRF register.
56 - rockchip,grf
70 rockchip,grf = <&grf>;
|
| H A D | rockchip,rk3308-codec.yaml | 34 rockchip,grf:
37 Phandle to the General Register Files (GRF)
78 - rockchip,grf
92 rockchip,grf = <&grf>;
|
| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 204 rockchip,grf = <&grf>;
273 grf: grf@20008000 { label
310 rockchip,grf = <&grf>;
325 rockchip,grf = <&grf>;
380 rockchip,grf = <&grf>;
395 rockchip,grf = <&grf>;
410 rockchip,grf = <&grf>;
|
| /linux/drivers/gpu/drm/rockchip/ |
| H A D | analogix_dp-rockchip.c | 45 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
46 * @lcdsel_grf_reg: grf register offset of lcdc select
66 struct regmap *grf; member
212 ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val); in rockchip_dp_drm_encoder_enable()
214 DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret); in rockchip_dp_drm_encoder_enable()
278 dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_dp_of_probe()
279 if (IS_ERR(dp->grf)) { in rockchip_dp_of_probe()
280 DRM_DEV_ERROR(dev, "failed to get rockchip,grf property\n"); in rockchip_dp_of_probe()
281 return PTR_ERR(dp->grf); in rockchip_dp_of_probe()
284 dp->grfclk = devm_clk_get(dev, "grf"); in rockchip_dp_of_probe()
[all …]
|
| H A D | rockchip_lvds.c | 50 struct regmap *grf; member
231 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); in rk3288_lvds_poweroff()
233 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); in rk3288_lvds_poweroff()
264 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); in rk3288_lvds_grf_config()
266 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); in rk3288_lvds_grf_config()
285 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val); in rk3288_lvds_set_vop_source()
344 ret = regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1, in px30_lvds_poweron()
355 regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1, in px30_lvds_poweroff()
374 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1, in px30_lvds_grf_config()
388 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1, in px30_lvds_set_vop_source()
[all …]
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | rockchip,emac.yaml | 39 rockchip,grf:
42 Phandle to the syscon GRF used to control speed and mode for the EMAC.
58 - rockchip,grf
100 rockchip,grf = <&grf>;
|
| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-rk3x.yaml | 70 rockchip,grf:
74 the general register file (GRF)
76 (bit offset in the GRF) is also required.
123 - rockchip,grf
138 rockchip,grf = <&grf>;
|
| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-extra.dtsi | 31 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
36 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
41 compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
46 compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
344 rockchip,grf = <&sys_grf>;
345 rockchip,php-grf = <&php_grf>;
416 rockchip,u2phy-grf = <&usb2phy1_grf>;
417 rockchip,usb-grf = <&usb_grf>;
418 rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
419 rockchip,vo-grf = <&vo0_grf>;
[all …]
|