| /linux/arch/powerpc/platforms/52xx/ |
| H A D | mpc52xx_gpt.c | 8 * This file is a driver for the General Purpose Timer (gpt) devices 14 * This driver supports the GPIO and IRQ controller functions of the GPT 18 * this prevents the use of any gpt0 gpt function (i.e. they will fail with 19 * -EBUSY). Thus, the safety wdt function always has precedence over the gpt 25 * to the device tree node for the gpt device (typically in the .dts file 33 * be added to the device tree node for the gpt device: 38 * the IRQ number because the GPT only has a single IRQ source. For flags, 72 MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); 77 * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver 79 * @regs: virtual address of GPT register 139 struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d); mpc52xx_gpt_irq_unmask() local 149 struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d); mpc52xx_gpt_irq_mask() local 159 struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d); mpc52xx_gpt_irq_ack() local 166 struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d); mpc52xx_gpt_irq_set_type() local 194 struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc); mpc52xx_gpt_irq_cascade() local 205 struct mpc52xx_gpt_priv *gpt = h->host_data; mpc52xx_gpt_irq_map() local 219 struct mpc52xx_gpt_priv *gpt = h->host_data; mpc52xx_gpt_irq_xlate() local 240 mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv * gpt,struct device_node * node) mpc52xx_gpt_irq_setup() argument 278 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc); mpc52xx_gpt_gpio_get() local 286 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc); mpc52xx_gpt_gpio_set() local 302 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc); mpc52xx_gpt_gpio_dir_in() local 321 mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv * gpt) mpc52xx_gpt_gpio_setup() argument 354 mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv * gpt) mpc52xx_gpt_gpio_setup() argument 367 struct mpc52xx_gpt_priv *gpt; mpc52xx_gpt_from_irq() local 385 mpc52xx_gpt_do_start(struct mpc52xx_gpt_priv * gpt,u64 period,int continuous,int as_wdt) mpc52xx_gpt_do_start() argument 455 mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv * gpt,u64 period,int continuous) mpc52xx_gpt_start_timer() argument 468 mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv * gpt) mpc52xx_gpt_stop_timer() argument 491 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv * gpt) mpc52xx_gpt_timer_period() argument 675 mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv * gpt,const u32 * period) mpc52xx_gpt_wdt_setup() argument 702 mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv * gpt,const u32 * period) mpc52xx_gpt_wdt_setup() argument 715 struct mpc52xx_gpt_priv *gpt; mpc52xx_gpt_probe() local [all...] |
| H A D | Kconfig | 20 gpt nodes, then it is safe to use such gpt to reset the board,
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| H A D | mpc5200_simple.c | 16 * gpt nodes, then it is safe to use such gpt to reset the board,
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| /linux/block/partitions/ |
| H A D | efi.c | 19 * AGPT, allow override with 'gpt' kernel command line option. 40 * - moved le_efi_guid_to_cpus() back into this file. GPT is the only 42 * - Changed gpt structure names and members to be simpler and more Linux-like. 64 * - Added kernel command line option 'gpt' to override valid PMBR test. 93 /* This allows a kernel command line option 'gpt' to override 104 __setup("gpt", force_gpt_fn); 145 /* set to 0x00000001 (i.e., the LBA of the GPT Partition Header) */ in pmbr_part_valid() 167 * marked out by up to three GPT partitions. 217 pr_debug("GPT: mbr size in lba (%u) different than whole disk (%u).\n", in is_pmbr_valid() 264 * @gpt 271 alloc_read_gpt_entries(struct parsed_partitions * state,gpt_header * gpt) alloc_read_gpt_entries() argument 308 gpt_header *gpt; alloc_read_gpt_header() local 335 is_gpt_valid(struct parsed_partitions * state,u64 lba,gpt_header ** gpt,gpt_entry ** ptes) is_gpt_valid() argument 580 find_valid_gpt(struct parsed_partitions * state,gpt_header ** gpt,gpt_entry ** ptes) find_valid_gpt() argument 714 gpt_header *gpt = NULL; efi_partition() local [all...] |
| /linux/drivers/clk/spear/ |
| H A D | clk-gpt-synth.c | 9 #define pr_fmt(fmt) "clk-gpt-synth: " fmt 24 * Calculates gpt synth clk rate for different values of mscale and nscale 34 struct clk_gpt *gpt = to_clk_gpt(hw); in gpt_calc_rate() local 35 struct gpt_rate_tbl *rtbl = gpt->rtbl; in gpt_calc_rate() 45 struct clk_gpt *gpt = to_clk_gpt(hw); in clk_gpt_determine_rate() local 49 gpt_calc_rate, gpt->rtbl_cnt, &unused); in clk_gpt_determine_rate() 57 struct clk_gpt *gpt = to_clk_gpt(hw); in clk_gpt_recalc_rate() local 61 if (gpt->lock) in clk_gpt_recalc_rate() 62 spin_lock_irqsave(gpt->lock, flags); in clk_gpt_recalc_rate() 64 val = readl_relaxed(gpt->reg); in clk_gpt_recalc_rate() [all …]
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| H A D | Makefile | 6 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
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| /linux/drivers/clocksource/ |
| H A D | timer-imx-gpt.c | 73 const struct imx_gpt_data *gpt; member 155 void __iomem *reg = imxtm->base + imxtm->gpt->reg_tcn; in mxc_clocksource_init() 206 /* Disable interrupt in GPT module */ in mxc_shutdown() 207 imxtm->gpt->gpt_irq_disable(imxtm); in mxc_shutdown() 209 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn); in mxc_shutdown() 211 writel_relaxed(tcn - 3, imxtm->base + imxtm->gpt->reg_tcmp); in mxc_shutdown() 214 imxtm->gpt->gpt_irq_acknowledge(imxtm); in mxc_shutdown() 227 /* Disable interrupt in GPT module */ in mxc_set_oneshot() 228 imxtm->gpt->gpt_irq_disable(imxtm); in mxc_set_oneshot() 231 u32 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn); in mxc_set_oneshot() [all …]
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| H A D | timer-pistachio.c | 112 /* Disable GPT local before loading reload value */ in pistachio_clksrc_enable() 120 /* Disable GPT local */ in pistachio_clksrc_disable()
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | renesas,rzg2l-poeg.yaml | 7 title: Renesas RZ/G2L Port Output Enable for GPT (POEG) 13 The output pins(GTIOCxA and GTIOCxB) of the general PWM timer (GPT) can be 14 disabled by using the port output enabling function for the GPT (POEG). 17 * Output-disable request from the GPT. 21 are controlled by the GPT module. 46 renesas,gpt: 48 description: phandle to gpt instance that serves the pwm operation. 68 - renesas,gpt 85 renesas,gpt = <&gpt>;
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| H A D | lantiq,pinctrl-xway.txt | 51 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe 62 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe 74 spi, asc, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe 89 spi, usif, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe, gphy
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| /linux/arch/powerpc/boot/dts/ |
| H A D | mpc5200b.dtsi | 64 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 72 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 107 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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| H A D | lite5200.dts | 63 compatible = "fsl,mpc5200-gpt"; 70 compatible = "fsl,mpc5200-gpt"; 76 compatible = "fsl,mpc5200-gpt"; 82 compatible = "fsl,mpc5200-gpt"; 88 compatible = "fsl,mpc5200-gpt"; 94 compatible = "fsl,mpc5200-gpt"; 100 compatible = "fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200-gpt";
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | mpc5200.txt | 84 timer@<addr> fsl,mpc5200-gpt General purpose timers 102 fsl,mpc5200-gpt nodes 107 the watchdog. The timer will function as a GPT if the timer api is used, and 109 mode has priority over the gpt mode, i.e. if the watchdog is activated, any 110 gpt api call to this timer will fail with -EBUSY. 114 GPT0 will be marked as in-use watchdog, i.e. blocking every gpt access to it. 117 - just mark GPT0 as watchdog, blocking gpt accesses, and configure it later; 123 An mpc5200-gpt can be used as a single line GPIO controller. To do so, 124 add the following properties to the gpt node: 131 An mpc5200-gpt can be used as a single line edge sensitive interrupt [all …]
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | renesas,rzg2l-gpt.yaml | 4 $id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml# 7 title: Renesas RZ/G2L General PWM Timer (GPT) 13 RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer 63 - renesas,r9a07g044-gpt # RZ/G2{L,LC} 64 - renesas,r9a07g054-gpt # RZ/V2L 65 - const: renesas,rzg2l-gpt 267 gpt: pwm@10048000 { 268 compatible = "renesas,r9a07g044-gpt", "renesas,rzg2l-gpt";
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx27.dtsi | 110 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 119 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 128 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 387 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 396 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; [all...] |
| H A D | imxrt1050.dtsi | 152 gpt: timer@401ec000 { label 153 compatible = "fsl,imxrt1050-gpt", "fsl,imx6dl-gpt", "fsl,imx6sl-gpt";
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| H A D | imx25.dtsi | 362 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 370 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 378 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 386 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
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| H A D | imx7s.dtsi | 499 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; 508 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; 518 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; 528 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
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| H A D | imx35.dtsi | 216 gpt: timer@53f90000 { label 217 compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
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| H A D | imx1.dtsi | 79 compatible = "fsl,imx1-gpt"; 88 compatible = "fsl,imx1-gpt";
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-xway.c | 119 MFP_XWAY(GPIO4, GPIO, GPT, EPHY, MII), 120 MFP_XWAY(GPIO5, GPIO, MII, ASC, GPT), 140 MFP_XWAY(GPIO25, GPIO, EBU, MII, GPT), 195 GRP_MUX("gpt1", GPT, ase_pins_gpt1), 196 GRP_MUX("gpt2", GPT, ase_pins_gpt2), 197 GRP_MUX("gpt3", GPT, ase_pins_gpt3), 232 {"gpt", ARRAY_AND_SIZE(ase_gpt_grps)}, 249 MFP_XWAY(GPIO6, GPIO, STP, GPT, ASC), 264 MFP_XWAY(GPIO21, GPIO, PCI, EBU, GPT), 271 MFP_XWAY(GPIO28, GPIO, GPT, MII, SDIO), [all …]
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| /linux/arch/arm/mach-spear/ |
| H A D | time.c | 27 * Timer0 and Timer1 both belong to same gpt block in cpu subbsystem. Further 229 pr_err("%s:couldn't get clk for gpt\n", __func__); in spear_setup_of_timer() 235 pr_err("%s:couldn't prepare-enable gpt clock\n", __func__); in spear_setup_of_timer()
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| H A D | spear3xx.c | 81 pr_err("%s:couldn't get clk for gpt\n", __func__); in spear3xx_timer_init() 88 pr_err("%s:couldn't get %s as parent for gpt\n", in spear3xx_timer_init()
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| H A D | spear13xx.c | 108 pr_err("%s:couldn't get clk for gpt\n", __func__); in spear13xx_timer_init() 115 pr_err("%s:couldn't get %s as parent for gpt\n", __func__, in spear13xx_timer_init()
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| /linux/arch/powerpc/include/asm/ |
| H A D | mpc52xx.h | 106 /* GPT */ 283 extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period, 285 extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt); 286 extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);
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