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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dxlnx,gmii-to-rgmii.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx GMII to RGMII Converter
10 - Harini Katakam <harini.katakam@amd.com>
13 The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media
14 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
17 The Management Data Input/Output (MDIO) interface is used to configure the
20 The core cannot function without an external phy connected to it.
[all …]
H A Dxilinx_gmii2rgmii.txt2 --------------------------------------------------------
4 The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media
5 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
8 The Management Data Input/Output (MDIO) interface is used to configure the
18 - compatible : Should be "xlnx,gmii-to-rgmii-1.0"
19 - reg : The ID number for the phy, usually a small integer
20 - phy-handle : Should point to the external phy device.
25 #address-cells = <1>;
26 #size-cells = <0>;
27 phy: ethernet-phy@0 {
[all …]
H A Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-controller.yaml#
14 - Andrew Davis <afd@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
22 LANs. It interfaces directly to twisted pair media via an external
23 transformer. This device interfaces directly to the MAC layer through the
25 Media Independent Interface (GMII) or Reduced GMII (RGMII).
[all …]
H A Dcpsw.txt2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
H A Dti,cpsw-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
16 gigabit media independent interface (GMII),reduced gigabit media
17 independent interface (RGMII), reduced media independent interface (RMII),
24 - const: ti,cpsw-switch
[all …]
H A Dsnps,dwc-qos-ethernet.txt3 This binding is deprecated, but it continues to be supported, but new
4 features should be preferably added to the stmmac binding document.
13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidi
[all...]
H A Dxlnx,axi-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 provides connectivity to an external ethernet PHY supporting different
12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
[all …]
H A Drenesas,ethertsn.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Ethernet TSN End-station
10 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY.
17 - $ref: ethernet-controller.yaml#
22 - enum:
23 - renesas,r8a779g0-ethertsn # R-Car V4H
24 - const: renesas,rcar-gen4-ethertsn
[all …]
H A Dmarvell,pp2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcin Wojtas <mw@semihalf.com>
11 - Russell King <linux@armlinux.org>
21 - marvell,armada-375-pp2
22 - marvell,armada-7k-pp22
28 "#address-cells":
31 "#size-cells":
37 - description: main controller clock
[all …]
H A Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-phy.yaml#
14 - Andrew Davis <afd@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and
[all …]
H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
[all …]
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
21 Specifies the MAC address that was assigned to the network device.
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
30 to the device by the boot program is different from the
[all …]
H A Dibm,emac.txt4 the Axon bridge. To operate this needs to interact with a this
5 special McMAL DMA controller, and sometimes an RGMII or ZMII
6 interface. In addition to the nodes and properties described
8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dti,phy-gmii-sel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
15 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
20 +--------------+
21 +-------------------------------+ |SCM |
22 | CPSW | | +---------+ |
[all …]
H A Dti-phy-gmii-sel.txt2 -----------------------------------------------
5 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
10 +--------------+
11 +-------------------------------+ |SCM |
12 | CPSW | | +---------+ |
13 | +--------------------------------+gmii_sel | |
14 | | | | +---------+ |
15 | +----v---+ +--------+ | +--------------+
16 | |Port 1..<--+-->GMII/MII<------->
18 | +--------+ | +--------+ |
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/
H A Ducc.txt4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
16 This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
17 The port number is added to the minor number of the device. Unlike the
18 CPM UART driver, the port-number is required for the QE UART driver.
[all …]
/freebsd/sys/dev/etherswitch/arswitch/
H A Darswitch_8316.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2012 Stefan Bethke.
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
76 * + The switch port is GMII/RGMII; in ar8316_hw_setup()
77 * + Port 4 is either connected to the CPU or to the internal switch. in ar8316_hw_setup()
79 if (sc->is_rgmii && sc->phy4cpu) { in ar8316_hw_setup()
80 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE, in ar8316_hw_setup()
82 device_printf(sc->sc_dev, in ar8316_hw_setup()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
H A Dgemini-nas4220b.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
12 model = "Raidsonic NAS IB-4220-B";
13 compatible = "raidsonic,ib-4220-b", "cortina,gemini";
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
[all …]
H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]
/freebsd/sys/contrib/ncsw/inc/flib/
H A Dfsl_enet.h2 * Copyright 2008-2012 Freescale Semiconductor Inc.
12 * names of its contributors may be used to endorse or promote products
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 @Description Ethernet MAC-PHY Interface
44 E_ENET_IF_GMII = 0x00040000, /**< GMII interface */
45 E_ENET_IF_RGMII = 0x00050000, /**< RGMII interface */
72 @Description Enum for inter-module interrupts registration
168 /**< dTSEC Time-Stamp Receive Error */
172 /**< mEMAC Time-stamp FIFO ECC error interrupt;
[all …]
H A Dfsl_fman_memac.h2 * Copyright 2008-2012 Freescale Semiconductor Inc.
12 * names of its contributors may be used to endorse or promote products
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
54 #define CMD_CFG_LOOPBACK_EN 0x00000400 /* 21 XGMII/GMII loopback enable */
89 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
90 #define IF_MODE_XGMII 0x00000000 /* 30-31 XGMII (10G) interface */
91 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
94 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
95 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
[all …]
/freebsd/sys/contrib/ncsw/inc/
H A Denet_ext.h1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
12 * names of its contributors may be used to endorse or promote products
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 #define ENET_NUM_OCTETS_PER_ADDRESS 6 /**< Number of octets (8-bit bytes) in an ethernet addres…
65 @Description Ethernet MAC-PHY Interface
72 e_ENET_IF_GMII = E_ENET_IF_GMII, /**< GMII interface */
73 e_ENET_IF_RGMII = E_ENET_IF_RGMII, /**< RGMII interface */
83 auto-negotiation between MAC and phy
85 Note: 1000BaseX auto-negotiation relates
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
[all …]
/freebsd/sys/dev/mii/
H A Dmii_fdt.c1 /*-
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * Table to translate MII_CONTYPE_xxxx constants to/from devicetree strings.
53 * We explicitly associate the enum values with the strings in a table to avoid
55 * and to avoid problems if the enum gains new types that aren't in the FDT
65 {MII_CONTYPE_GMII, "gmii"},
69 {MII_CONTYPE_REVMII, "rev-mii"},
71 {MII_CONTYPE_RGMII, "rgmii"},
72 {MII_CONTYPE_RGMII_ID, "rgmii-id"},
[all …]

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