1a043e8c7SAdrian Chadd /*-
2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni *
4a043e8c7SAdrian Chadd * Copyright (c) 2011-2012 Stefan Bethke.
5a043e8c7SAdrian Chadd * Copyright (c) 2012 Adrian Chadd.
6a043e8c7SAdrian Chadd * All rights reserved.
7a043e8c7SAdrian Chadd *
8a043e8c7SAdrian Chadd * Redistribution and use in source and binary forms, with or without
9a043e8c7SAdrian Chadd * modification, are permitted provided that the following conditions
10a043e8c7SAdrian Chadd * are met:
11a043e8c7SAdrian Chadd * 1. Redistributions of source code must retain the above copyright
12a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer.
13a043e8c7SAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright
14a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer in the
15a043e8c7SAdrian Chadd * documentation and/or other materials provided with the distribution.
16a043e8c7SAdrian Chadd *
17a043e8c7SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18a043e8c7SAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19a043e8c7SAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20a043e8c7SAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21a043e8c7SAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22a043e8c7SAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23a043e8c7SAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24a043e8c7SAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25a043e8c7SAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26a043e8c7SAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27a043e8c7SAdrian Chadd * SUCH DAMAGE.
28a043e8c7SAdrian Chadd */
29a043e8c7SAdrian Chadd
30a043e8c7SAdrian Chadd #include <sys/param.h>
31a043e8c7SAdrian Chadd #include <sys/bus.h>
32a043e8c7SAdrian Chadd #include <sys/errno.h>
33a043e8c7SAdrian Chadd #include <sys/kernel.h>
34a043e8c7SAdrian Chadd #include <sys/module.h>
35a043e8c7SAdrian Chadd #include <sys/socket.h>
36a043e8c7SAdrian Chadd #include <sys/sockio.h>
37a043e8c7SAdrian Chadd #include <sys/sysctl.h>
38a043e8c7SAdrian Chadd #include <sys/systm.h>
39a043e8c7SAdrian Chadd
40a043e8c7SAdrian Chadd #include <net/if.h>
41a043e8c7SAdrian Chadd #include <net/if_arp.h>
42a043e8c7SAdrian Chadd #include <net/ethernet.h>
43a043e8c7SAdrian Chadd #include <net/if_dl.h>
44a043e8c7SAdrian Chadd #include <net/if_media.h>
45a043e8c7SAdrian Chadd #include <net/if_types.h>
46a043e8c7SAdrian Chadd
47a043e8c7SAdrian Chadd #include <machine/bus.h>
48efce3748SRui Paulo #include <dev/iicbus/iic.h>
49a043e8c7SAdrian Chadd #include <dev/iicbus/iiconf.h>
50a043e8c7SAdrian Chadd #include <dev/iicbus/iicbus.h>
51a043e8c7SAdrian Chadd #include <dev/mii/mii.h>
52a043e8c7SAdrian Chadd #include <dev/mii/miivar.h>
5371e8eac4SAdrian Chadd #include <dev/mdio/mdio.h>
54a043e8c7SAdrian Chadd
55a043e8c7SAdrian Chadd #include <dev/etherswitch/etherswitch.h>
56a043e8c7SAdrian Chadd
57a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitchreg.h>
58a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitchvar.h>
59a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitch_reg.h>
60a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitch_8316.h>
61a043e8c7SAdrian Chadd
62a043e8c7SAdrian Chadd #include "mdio_if.h"
63a043e8c7SAdrian Chadd #include "miibus_if.h"
64a043e8c7SAdrian Chadd #include "etherswitch_if.h"
65a043e8c7SAdrian Chadd
66a043e8c7SAdrian Chadd /*
67a043e8c7SAdrian Chadd * AR8316 specific functions
68a043e8c7SAdrian Chadd */
69a043e8c7SAdrian Chadd static int
ar8316_hw_setup(struct arswitch_softc * sc)70a043e8c7SAdrian Chadd ar8316_hw_setup(struct arswitch_softc *sc)
71a043e8c7SAdrian Chadd {
72a043e8c7SAdrian Chadd
73a043e8c7SAdrian Chadd /*
74a043e8c7SAdrian Chadd * Configure the switch mode based on whether:
75a043e8c7SAdrian Chadd *
76a043e8c7SAdrian Chadd * + The switch port is GMII/RGMII;
77a043e8c7SAdrian Chadd * + Port 4 is either connected to the CPU or to the internal switch.
78a043e8c7SAdrian Chadd */
79a043e8c7SAdrian Chadd if (sc->is_rgmii && sc->phy4cpu) {
80a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
81a043e8c7SAdrian Chadd AR8X16_MODE_RGMII_PORT4_ISO);
82a043e8c7SAdrian Chadd device_printf(sc->sc_dev,
83a043e8c7SAdrian Chadd "%s: MAC port == RGMII, port 4 = dedicated PHY\n",
84a043e8c7SAdrian Chadd __func__);
85a043e8c7SAdrian Chadd } else if (sc->is_rgmii) {
86a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
87a043e8c7SAdrian Chadd AR8X16_MODE_RGMII_PORT4_SWITCH);
88a043e8c7SAdrian Chadd device_printf(sc->sc_dev,
89a043e8c7SAdrian Chadd "%s: MAC port == RGMII, port 4 = switch port\n",
90a043e8c7SAdrian Chadd __func__);
91a043e8c7SAdrian Chadd } else if (sc->is_gmii) {
92a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
93a043e8c7SAdrian Chadd AR8X16_MODE_GMII);
94a043e8c7SAdrian Chadd device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__);
95a043e8c7SAdrian Chadd } else {
96a043e8c7SAdrian Chadd device_printf(sc->sc_dev, "%s: unknown switch PHY config\n",
97a043e8c7SAdrian Chadd __func__);
98a043e8c7SAdrian Chadd return (ENXIO);
99a043e8c7SAdrian Chadd }
100a043e8c7SAdrian Chadd
101a043e8c7SAdrian Chadd DELAY(1000); /* 1ms wait for things to settle */
102a043e8c7SAdrian Chadd
103a043e8c7SAdrian Chadd /*
104a043e8c7SAdrian Chadd * If port 4 is RGMII, force workaround
105a043e8c7SAdrian Chadd */
106a043e8c7SAdrian Chadd if (sc->is_rgmii && sc->phy4cpu) {
107a043e8c7SAdrian Chadd device_printf(sc->sc_dev,
108a043e8c7SAdrian Chadd "%s: port 4 RGMII workaround\n",
109a043e8c7SAdrian Chadd __func__);
110a043e8c7SAdrian Chadd
111a043e8c7SAdrian Chadd /* work around for phy4 rgmii mode */
112a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c);
113a043e8c7SAdrian Chadd /* rx delay */
114a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e);
115a043e8c7SAdrian Chadd /* tx delay */
116a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47);
117a043e8c7SAdrian Chadd DELAY(1000); /* 1ms, again to let things settle */
118a043e8c7SAdrian Chadd }
119a043e8c7SAdrian Chadd
120a043e8c7SAdrian Chadd return (0);
121a043e8c7SAdrian Chadd }
122a043e8c7SAdrian Chadd
123a043e8c7SAdrian Chadd /*
124a043e8c7SAdrian Chadd * Initialise other global values, for the AR8316.
125a043e8c7SAdrian Chadd */
126a043e8c7SAdrian Chadd static int
ar8316_hw_global_setup(struct arswitch_softc * sc)127a043e8c7SAdrian Chadd ar8316_hw_global_setup(struct arswitch_softc *sc)
128a043e8c7SAdrian Chadd {
129a043e8c7SAdrian Chadd
1306d011946SKristof Provost ARSWITCH_LOCK(sc);
1316d011946SKristof Provost
132b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC);
133b9f07b86SLuiz Otavio O Souza
134b9f07b86SLuiz Otavio O Souza /* Enable CPU port and disable mirror port. */
135b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
136b9f07b86SLuiz Otavio O Souza AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
137b9f07b86SLuiz Otavio O Souza
138b9f07b86SLuiz Otavio O Souza /* Setup TAG priority mapping. */
139b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
140b9f07b86SLuiz Otavio O Souza
141031f3eaeSAdrian Chadd /*
142031f3eaeSAdrian Chadd * Flood address table misses to all ports, and enable forwarding of
143031f3eaeSAdrian Chadd * broadcasts to the cpu port.
144031f3eaeSAdrian Chadd */
145031f3eaeSAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
146031f3eaeSAdrian Chadd AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f);
147031f3eaeSAdrian Chadd
148b9f07b86SLuiz Otavio O Souza /* Enable jumbo frames. */
149a043e8c7SAdrian Chadd arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
150a043e8c7SAdrian Chadd AR8316_GLOBAL_CTRL_MTU_MASK, 9018 + 8 + 2);
151a043e8c7SAdrian Chadd
152b9f07b86SLuiz Otavio O Souza /* Setup service TAG. */
153b9f07b86SLuiz Otavio O Souza arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
154b9f07b86SLuiz Otavio O Souza AR8X16_SERVICE_TAG_MASK, 0);
155b9f07b86SLuiz Otavio O Souza
1566d011946SKristof Provost ARSWITCH_UNLOCK(sc);
157a043e8c7SAdrian Chadd return (0);
158a043e8c7SAdrian Chadd }
159a043e8c7SAdrian Chadd
160a043e8c7SAdrian Chadd void
ar8316_attach(struct arswitch_softc * sc)161a043e8c7SAdrian Chadd ar8316_attach(struct arswitch_softc *sc)
162a043e8c7SAdrian Chadd {
163a043e8c7SAdrian Chadd
164a043e8c7SAdrian Chadd sc->hal.arswitch_hw_setup = ar8316_hw_setup;
165a043e8c7SAdrian Chadd sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup;
166b9f07b86SLuiz Otavio O Souza
167b9f07b86SLuiz Otavio O Souza /* Set the switch vlan capabilities. */
168b9f07b86SLuiz Otavio O Souza sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
169b9f07b86SLuiz Otavio O Souza ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
170b9f07b86SLuiz Otavio O Souza sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
171a043e8c7SAdrian Chadd }
172