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/linux/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi6 #include <dt-bindings/clock/sifive-fu540-prci.h>
11 compatible = "sifive,fu540-c000", "sifive,fu540";
182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
196 compatible = "sifive,fu540-c000-prci";
202 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
210 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
219 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
227 compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
239 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
250 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
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H A Dhifive-unleashed-a00.dts4 #include "fu540-c000.dtsi"
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
15 "sifive,fu540";
H A Dfu740-c000.dtsi185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
276 compatible = "sifive,fu540-c000-gem";
/linux/Documentation/devicetree/bindings/clock/sifive/
H A Dfu540-prci.yaml5 $id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
8 title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
14 On the FU540 family of SoCs, most system-wide clock and reset integration
17 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
26 const: sifive,fu540-c000-prci
55 compatible = "sifive,fu540-c000-prci";
/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-sifive.yaml30 - sifive,fu540-c000-pwm
35 compatible strings are "sifive,fu540-c000-pwm" and
37 SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
66 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
/linux/Documentation/devicetree/bindings/cache/
H A Dsifive,ccache0.yaml25 - sifive,fu540-c000-ccache
37 - sifive,fu540-c000-ccache
49 - const: sifive,fu540-c000-ccache
54 - const: sifive,fu540-c000-ccache
154 - sifive,fu540-c000-ccache
204 compatible = "sifive,fu540-c000-ccache", "cache";
/linux/Documentation/devicetree/bindings/gpio/
H A Dsifive,gpio.yaml16 - sifive,fu540-c000-gpio
69 - sifive,fu540-c000-gpio
79 #include <dt-bindings/clock/sifive-fu540-prci.h>
81 compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
/linux/drivers/clk/sifive/
H A Dfu540-prci.h8 * The FU540 PRCI implements clock and reset control for the SiFive
9 * FU540-C000 chip. This driver assumes that it has sole control
16 * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
25 #include <dt-bindings/clock/sifive-fu540-prci.h>
H A DKconfig20 FU540/FU740 SoCs. If this kernel is meant to run on a SiFive FU540/
H A Dsifive-prci.c12 #include "fu540-prci.h"
603 {.compatible = "sifive,fu540-c000-prci", .data = &prci_clk_fu540},
/linux/Documentation/devicetree/bindings/spi/
H A Dspi-sifive.yaml21 - sifive,fu540-c000-spi
28 "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
29 as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
76 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
/linux/Documentation/devicetree/bindings/serial/
H A Dsifive-serial.yaml21 - sifive,fu540-c000-uart
56 #include <dt-bindings/clock/sifive-fu540-prci.h>
58 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
/linux/drivers/dma/sf-pdma/
H A Dsf-pdma.h3 * SiFive FU540 Platform DMA driver
13 * SiFive FU540-C000 v1.0
14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
/linux/Documentation/devicetree/bindings/timer/
H A Dsifive,clint.yaml34 - sifive,fu540-c000-clint # SiFive FU540
99 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
/linux/Documentation/devicetree/bindings/riscv/
H A Dsifive.yaml24 - const: sifive,fu540-c000
25 - const: sifive,fu540
/linux/Documentation/devicetree/bindings/sifive/
H A Dsifive-blocks-ip-versioning.txt30 "sifive,fu540-c000-uart". This way, if SoC-specific
38 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
/linux/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml22 - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsifive,plic-1.0.0.yaml65 - sifive,fu540-c000-plic
176 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi210 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
222 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
232 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
/linux/drivers/pwm/
H A Dpwm-sifive.c5 * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf
/linux/drivers/tty/serial/
H A Dsifive.c772 OF_EARLYCON_DECLARE(sifive, "sifive,fu540-c000-uart",
1103 { .compatible = "sifive,fu540-c000-uart" },
H A DKconfig984 SiFive FU540 SoCs, among others.
/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c42 /* This structure is only used for MACB on SiFive FU540 devices */
5407 { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },