Searched full:ethdr (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_disp_ovl_adaptor.c | 75 [OVL_ADAPTOR_TYPE_ETHDR] = "ethdr",
81 static const struct mtk_ddp_comp_funcs ethdr = { variable
109 [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, DDP_COMPONENT_ETHDR_MIXER, 0, ðdr },
142 struct device *ethdr; in mtk_ovl_adaptor_layer_config() local
158 ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; in mtk_ovl_adaptor_layer_config()
164 mtk_ethdr_layer_config(ethdr, idx, state, cmdq_pkt); in mtk_ovl_adaptor_layer_config()
168 /* ETHDR is in 1T2P domain, width needs to be 2 pixels align */ in mtk_ovl_adaptor_layer_config()
206 mtk_ethdr_layer_config(ethdr, idx, state, cmdq_pkt); in mtk_ovl_adaptor_layer_config()
489 { .compatible = "mediatek,mt8195-disp-ethdr", .data = (void *)OVL_ADAPTOR_TYPE_ETHDR },
526 * In the context of mediatek-drm, ETHDR, MDP_RDMA and Padding are in mtk_ovl_adaptor_is_comp_present()
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| H A D | mtk_ethdr.c | 366 "cannot get ethdr reset control\n"); in mtk_ethdr_probe()
383 { .compatible = "mediatek,mt8195-disp-ethdr"},
393 .name = "mediatek-disp-ethdr",
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| H A D | mtk_drm_drv.c | 327 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
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| /linux/drivers/soc/mediatek/ |
| H A D | mtk-mmsys.h | 104 * fixed value when the frame rate is decided, but ETHDR and
106 * MIXER has to sync with ETHDR by adjusting VSYNC length.
112 * ETHDR is bypassed, otherwise MIXER could wait too long and causing
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,padding.yaml | 16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8188.dtsi | 2874 ethdr0: ethdr@1c114000 {
2875 compatible = "mediatek,mt8188-disp-ethdr", "mediatek,mt8195-disp-ethdr";
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| H A D | mt8195.dtsi | 3531 compatible = "mediatek,mt8195-disp-ethdr";
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