Home
last modified time | relevance | path

Searched full:ethdr (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/soc/mediatek/
H A Dmtk-mmsys.h118 * fixed value when the frame rate is decided, but ETHDR and
120 * MIXER has to sync with ETHDR by adjusting VSYNC length.
126 * ETHDR is bypassed, otherwise MIXER could wait too long and causing
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,merge.yaml95 ETHDR or even from a different MERGE block
100 MERGE output to a DSC, DPI, DP_INTF, DSI, ETHDR, Write DMA, or
H A Dmediatek,padding.yaml16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_ethdr.c366 "cannot get ethdr reset control\n"); in mtk_ethdr_probe()
383 { .compatible = "mediatek,mt8195-disp-ethdr"},
393 .name = "mediatek-disp-ethdr",
H A Dmtk_drm_drv.c325 .min_width = 2, /* 2-pixel align when ethdr is bypassed */