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/linux/drivers/dma/dw-edma/
H A Ddw-edma-v0-debugfs.c12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_edma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
27 if ((dw)->chip->mf == EDMA_MF_EDMA_LEGACY) \
28 __ch_regs = REGS_ADDR(dw, type.legacy.ch); \
30 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
32 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].wr); \
[all …]
H A Ddw-hdma-v0-debugfs.c12 #include "dw-hdma-v0-debugfs.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
[all …]
H A Ddw-hdma-v0-core.c11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
26 static inline struct dw_hdma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
28 return dw->chip->reg_base; in __dw_regs()
32 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) in __dw_ch_regs() argument
35 return &(__dw_regs(dw)->ch[ch].wr); in __dw_ch_regs()
37 return &(__dw_regs(dw)->ch[ch].rd); in __dw_ch_regs()
40 #define SET_CH_32(dw, dir, ch, name, value) \ argument
[all …]
H A Ddw-edma-core.c20 #include "dw-edma-core.h"
21 #include "dw-edma-v0-core.h"
22 #include "dw-hdma-v0-core.h"
35 struct dw_edma_chip *chip = chan->dw->chip; in dw_edma_get_pci_address()
67 struct dw_edma_chip *chip = desc->chan->dw->chip; in dw_edma_alloc_chunk()
176 struct dw_edma *dw = chan->dw; in dw_edma_start_transfer() local
194 dw_edma_core_start(dw, child, !desc->xfer_sz); in dw_edma_start_transfer()
209 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { in dw_edma_device_caps()
230 if (chan->dw->chip->mf == EDMA_MF_HDMA_NATIVE) { in dw_edma_device_config()
246 cfg_non_ll = chan->dw->chip->cfg_non_ll; in dw_edma_device_config()
[all …]
H A DMakefile3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
5 dw-hdma-v0-debugfs.o
6 dw-edma-objs := dw-edma-core.o \
7 dw-edma-v0-core.o \
8 dw-hdma-v0-core.o $(dw-edma-y)
9 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
/linux/drivers/gpu/drm/xe/
H A Dxe_ring_ops.c83 static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i) in emit_aux_table_inv() argument
90 return emit(gt, dw + i) - dw; in emit_aux_table_inv()
95 static int emit_user_interrupt(u32 *dw, int i) in emit_user_interrupt() argument
97 dw[i++] = MI_USER_INTERRUPT; in emit_user_interrupt()
98 dw[i++] = MI_ARB_ON_OFF | MI_ARB_ENABLE; in emit_user_interrupt()
99 dw[i++] = MI_ARB_CHECK; in emit_user_interrupt()
104 static int emit_store_imm_ggtt(u32 addr, u32 value, u32 *dw, int i) in emit_store_imm_ggtt() argument
106 dw[i++] = MI_STORE_DATA_IMM | MI_SDI_GGTT | MI_SDI_NUM_DW(1); in emit_store_imm_ggtt()
107 dw[i++] = addr; in emit_store_imm_ggtt()
108 dw[i++] = 0; in emit_store_imm_ggtt()
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-ahb-audio.c22 #include "dw-hdmi-audio.h"
24 #define DRIVER_NAME "dw-hdmi-ahb-audio"
154 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
157 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_iec958()
158 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_iec958()
159 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_iec958()
182 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_s24() argument
185 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_s24()
186 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_s24()
187 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_s24()
[all …]
/linux/drivers/dma/dw/
H A Dcore.c80 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
84 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
99 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
107 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
111 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
117 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
119 dw->initialize_chan(dwc); in dwc_initialize()
122 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
123 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
139 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
[all …]
H A Ddw.c16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan() local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); in dw_dma_initialize_chan()
100 static void dw_dma_set_device_name(struct dw_dma *dw, int id) in dw_dma_set_device_name() argument
102 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); in dw_dma_set_device_name()
105 static void dw_dma_disable(struct dw_dma *dw) in dw_dma_disable() argument
107 do_dw_dma_off(dw); in dw_dma_disable()
110 static void dw_dma_enable(struct dw_dma *dw) in dw_dma_enable() argument
112 do_dw_dma_on(dw); in dw_dma_enable()
117 struct dw_dma *dw; in dw_dma_probe() local
119 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
[all …]
H A Didma32.c48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar() local
49 void __iomem *misc = __dw_regs(dw); in idma32_initialize_chan_xbar()
221 static void idma32_set_device_name(struct dw_dma *dw, int id) in idma32_set_device_name() argument
223 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); in idma32_set_device_name()
232 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
245 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
246 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
249 static void idma32_disable(struct dw_dma *dw) in idma32_disable() argument
251 do_dw_dma_off(dw); in idma32_disable()
252 idma32_fifo_partition(dw); in idma32_disable()
[all …]
H A Dinternal.h11 #include <linux/dma/dw.h>
18 void do_dw_dma_on(struct dw_dma *dw);
19 void do_dw_dma_off(struct dw_dma *dw);
27 void dw_dma_acpi_controller_register(struct dw_dma *dw);
28 void dw_dma_acpi_controller_free(struct dw_dma *dw);
30 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} in dw_dma_acpi_controller_register() argument
31 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} in dw_dma_acpi_controller_free() argument
38 void dw_dma_of_controller_register(struct dw_dma *dw);
39 void dw_dma_of_controller_free(struct dw_dma *dw);
45 static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} in dw_dma_of_controller_register() argument
[all …]
H A Dof.c19 struct dw_dma *dw = ofdma->of_dma_data; in dw_dma_of_xlate() local
21 .dma_dev = dw->dma.dev, in dw_dma_of_xlate()
37 slave.m_master >= dw->pdata->nr_masters || in dw_dma_of_xlate()
38 slave.p_master >= dw->pdata->nr_masters || in dw_dma_of_xlate()
39 slave.channels >= BIT(dw->pdata->nr_channels))) in dw_dma_of_xlate()
101 void dw_dma_of_controller_register(struct dw_dma *dw) in dw_dma_of_controller_register() argument
103 struct device *dev = dw->dma.dev; in dw_dma_of_controller_register()
109 ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw); in dw_dma_of_controller_register()
114 void dw_dma_of_controller_free(struct dw_dma *dw) in dw_dma_of_controller_free() argument
116 struct device *dev = dw->dma.dev; in dw_dma_of_controller_free()
/linux/arch/arm/boot/dts/synaptics/
H A Dberlin2cd.dtsi175 compatible = "snps,dw-apb-gpio";
181 compatible = "snps,dw-apb-gpio-port";
193 compatible = "snps,dw-apb-gpio";
199 compatible = "snps,dw-apb-gpio-port";
211 compatible = "snps,dw-apb-gpio";
217 compatible = "snps,dw-apb-gpio-port";
229 compatible = "snps,dw-apb-gpio";
235 compatible = "snps,dw-apb-gpio-port";
267 compatible = "snps,dw-apb-ssi";
277 compatible = "snps,dw-wdt";
[all …]
H A Dberlin2.dtsi185 compatible = "snps,dw-apb-gpio";
191 compatible = "snps,dw-apb-gpio-port";
203 compatible = "snps,dw-apb-gpio";
209 compatible = "snps,dw-apb-gpio-port";
221 compatible = "snps,dw-apb-gpio";
227 compatible = "snps,dw-apb-gpio-port";
239 compatible = "snps,dw-apb-gpio";
245 compatible = "snps,dw-apb-gpio-port";
257 compatible = "snps,dw-apb-timer";
266 compatible = "snps,dw-apb-timer";
[all …]
H A Dberlin2q.dtsi246 compatible = "snps,dw-apb-gpio";
252 compatible = "snps,dw-apb-gpio-port";
264 compatible = "snps,dw-apb-gpio";
270 compatible = "snps,dw-apb-gpio-port";
282 compatible = "snps,dw-apb-gpio";
288 compatible = "snps,dw-apb-gpio-port";
300 compatible = "snps,dw-apb-gpio";
306 compatible = "snps,dw-apb-gpio-port";
342 compatible = "snps,dw-apb-timer";
350 compatible = "snps,dw-apb-timer";
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
18 - const: snps,dw-wdt
38 - const: snps,dw-wdt
44 description: DW Watchdog pre-timeout interrupt
60 description: Phandle to the DW Watchdog reset lane
66 DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs).
70 the timer expiration intervals supported by the DW APB Watchdog. Note
71 DW APB Watchdog IP-core might be synthesized with fixed TOP values,
90 compatible = "snps,dw-wdt";
99 compatible = "snps,dw-wdt";
/linux/arch/arm64/boot/dts/synaptics/
H A Dberlin4ct.dtsi136 compatible = "snps,dw-apb-gpio";
142 compatible = "snps,dw-apb-gpio-port";
154 compatible = "snps,dw-apb-gpio";
160 compatible = "snps,dw-apb-gpio-port";
172 compatible = "snps,dw-apb-gpio";
178 compatible = "snps,dw-apb-gpio-port";
190 compatible = "snps,dw-apb-gpio";
196 compatible = "snps,dw-apb-gpio-port";
208 compatible = "snps,dw-apb-ictl";
235 compatible = "snps,dw-apb-ictl";
[all …]
/linux/Documentation/devicetree/bindings/net/pcs/
H A Dsnps,dw-xpcs.yaml4 $id: http://devicetree.org/schemas/net/pcs/snps,dw-xpcs.yaml#
29 const: snps,dw-xpcs
31 const: snps,dw-xpcs-gen1-3g
33 const: snps,dw-xpcs-gen2-3g
35 const: snps,dw-xpcs-gen2-6g
37 const: snps,dw-xpcs-gen4-3g
39 const: snps,dw-xpcs-gen4-6g
41 const: snps,dw-xpcs-gen5-10g
43 const: snps,dw-xpcs-gen5-12g
49 of the MDIO bus device. If DW XPCS CSRs space is accessed over the
[all …]
/linux/arch/arc/boot/dts/
H A Daxs10x_mb.dtsi55 * DW sdio controller has external ciu clock divider
103 * According to DW Mobile Storage databook it is required
112 * "altr,socfpga-dw-mshc".
116 * "snps,dw-mshc" should be enough for all users of DW MMC once
121 compatible = "altr,socfpga-dw-mshc";
132 compatible = "snps,dw-apb-uart";
142 compatible = "snps,dw-apb-uart";
153 compatible = "snps,dw-apb-uart";
244 compatible = "snps,dw-apb-gpio";
250 compatible = "snps,dw-apb-gpio-port";
[all …]
H A Daxc003.dtsi55 dw-apb-gpio@2000 {
56 compatible = "snps,dw-apb-gpio";
62 compatible = "snps,dw-apb-gpio-port";
74 debug_uart: dw-apb-uart@5000 {
75 compatible = "snps,dw-apb-uart";
120 * The DW APB ICTL intc on MB is connected to CPU intc via a
121 * DT "invisible" DW APB GPIO block, configured to simply pass thru
125 * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
126 * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
134 compatible = "snps,dw-apb-ictl";
/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dpio_phy_regs.h11 #define _VLV_CMN(dw) (0x8100 + (dw) * 4) argument
12 #define _CHV_CMN(cl, dw) (0x8100 - (cl) * 0x80 + (dw) * 4) argument
13 #define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */ argument
14 #define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4) argument
15 #define _VLV_REF(dw) (0x80a0 + ((dw) - 8) * 4) /* dw 8-15 */ argument
16 #define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4) argument
17 #define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4) argument
18 #define _VLV_PCS_BCAST(dw) (0xc000 + (dw) * 4) argument
19 #define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4) argument
20 #define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4) argument
[all …]
/linux/drivers/misc/sgi-gru/
H A Dgruhandles.h184 unsigned int cmd:1; /* DW 0 */
199 unsigned long vaddr:64; /* DW 1 */
201 unsigned int asid:24; /* DW 2 */
210 unsigned long vaddrmask:39; /* DW 3 */
259 unsigned int cmd:1; /* DW 0 - low 32*/
274 unsigned int indexway:12; /* DW 0 - high 32 */
280 unsigned long missvaddr:64; /* DW 1 */
282 unsigned int missasid:24; /* DW 2 */
289 unsigned long pfn:41; /* DW 3 */
294 unsigned long fillvaddr:64; /* DW 4 */
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-xdata1 What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write
13 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write
15 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write
21 cat /sys/class/misc/dw-xdata-pcie.<device>/write
26 What: /sys/class/misc/dw-xdata-pcie.<device>/read
38 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/read
40 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/read
46 cat /sys/class/misc/dw-xdata-pcie.<device>/read
/linux/drivers/edac/
H A Di5100_edac.c476 u32 dw; in i5100_read_log() local
485 pci_read_config_dword(pdev, I5100_VALIDLOG, &dw); in i5100_read_log()
487 if (i5100_validlog_redmemvalid(dw)) { in i5100_read_log()
493 if (i5100_validlog_recmemvalid(dw)) { in i5100_read_log()
515 if (i5100_validlog_nrecmemvalid(dw)) { in i5100_read_log()
537 pci_write_config_dword(pdev, I5100_VALIDLOG, dw); in i5100_read_log()
543 u32 dw, dw2; in i5100_check_error() local
545 pci_read_config_dword(priv->mc, I5100_FERR_NF_MEM, &dw); in i5100_check_error()
546 if (i5100_ferr_nf_mem_any(dw)) { in i5100_check_error()
550 i5100_read_log(mci, i5100_ferr_nf_mem_chan_indx(dw), in i5100_check_error()
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dsnps,dw-apb-timer.yaml4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml#
15 - const: snps,dw-apb-timer
17 - snps,dw-apb-timer-sp
18 - snps,dw-apb-timer-osc
63 compatible = "snps,dw-apb-timer";
71 compatible = "snps,dw-apb-timer";
79 compatible = "snps,dw-apb-timer";

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