Home
last modified time | relevance | path

Searched full:ddr2 (Results 1 – 25 of 59) sorted by relevance

123

/linux/arch/arm/mach-davinci/
H A Dsleep.S12 #include "ddr2.h"
34 * r0: contains virtual base for DDR2 controller
35 * r1: contains virtual base for DDR2 Power and Sleep controller (PSC)
36 * r2: contains PSC number for DDR2
37 * r3: contains virtual base DDR2 PLL controller
66 /* Disable DDR2 LPSC */
138 /* Start 2x clock to DDR2 */
146 /* Enable DDR2 LPSC */
168 * Disables or Enables DDR2 LPSC
171 * r1: contains virtual base for DDR2 Power and Sleep controller (PSC)
[all …]
H A Ddevices-da8xx.c66 pr_warn("%s: Unable to map DDR2 controller", __func__); in da8xx_get_mem_ctlr()
/linux/Documentation/devicetree/bindings/clock/
H A Dbrcm,bcm2835-cprman.txt26 - DSI0 DDR2 clock
29 - DSI1 DDR2 clock
/linux/drivers/memory/
H A DKconfig97 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
192 bool "Texas Instruments da8xx DDR2/mDDR driver"
195 This driver is for the DDR2/mDDR Memory Controller present on
H A Dda8xx-ddrctl.c3 * TI da8xx DDR2/mDDR controller driver
165 MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver");
H A Dti-emif-sram-pm.S226 * disabled for DDR2 no harm in restoring the
232 /* Write to sdcfg last for DDR2 only */
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dsddr2.c47 /* The following are available in some, but not all DDR2 docs */
55 /* The following are available in some, but not all DDR2 docs */
/linux/include/linux/
H A Dedac.h161 * @MEM_DDR2: DDR2 RAM, as described at JEDEC JESD79-2F.
164 * @MEM_FB_DDR2: Fully-Buffered DDR2, as described at JEDEC Std No. 205
168 * @MEM_RDDR2: Registered DDR2 RAM
169 * This is a variant of the DDR2 memories.
172 * created to compete with DDR2. Weren't used on any
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca9.dts245 /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
254 /* DDR2 SDRAM VTT termination voltage */
/linux/arch/mips/ralink/
H A Dmt7620.c67 pr_info("Board has DDR2\n"); in mt7620_dram_init()
87 pr_info("Board has DDR2\n"); in mt7628_dram_init()
/linux/arch/mips/pic32/
H A DKconfig28 internally packaged DDR2 memory up to 128MB.
/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,hr2.yaml12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,da8xx-ddrctl.yaml7 title: Texas Instruments da8xx DDR2/mDDR memory controller
H A Dnvidia,tegra20-emc.yaml19 standard protocols: DDR1, LPDDR2 and DDR2.
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-eukrea-mbmx287lc.dts8 * Module contains : i.MX287 + 128MB DDR2 + NAND + 2 x Ethernet PHY + RTC
H A Dimx28-eukrea-mbmx283lc.dts8 * Module contains : i.MX282 + 64MB DDR2 + NAND + Ethernet PHY + RTC
/linux/Documentation/devicetree/bindings/display/
H A Dbrcm,bcm2835-dsi0.yaml44 # - description: The DSI DDR2 clock
/linux/drivers/bcma/
H A Dscan.c41 { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
90 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
102 { BCMA_CORE_CMEM, "CNDS DDR2/3 memory controller" },
/linux/Documentation/driver-api/memory-devices/
H A Dti-emif.rst30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
/linux/arch/powerpc/boot/dts/fsl/
H A Db4860si-post.dtsi78 dev-handle = <&ddr2>;
238 ddr2: memory-controller@9000 { label
H A Dp5020si-post.dtsi235 dev-handle = <&ddr2>;
285 ddr2: memory-controller@9000 { label
H A Dp5040si-post.dtsi180 dev-handle = <&ddr2>;
240 ddr2: memory-controller@9000 { label
/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c47 {1, 0, 800, 400, 3382, 33382, 3983, 33983}, /* DDR2-400 SC */
48 {1, 0, 800, 667, 3354, 33354, 3807, 33807}, /* DDR2-667 SC */
49 {1, 0, 800, 800, 3347, 33347, 3763, 33763}, /* DDR2-800 SC */
53 {1, 0, 667, 400, 3400, 33400, 4021, 34021}, /* DDR2-400 SC */
54 {1, 0, 667, 667, 3372, 33372, 3845, 33845}, /* DDR2-667 SC */
55 {1, 0, 667, 800, 3386, 33386, 3822, 33822}, /* DDR2-800 SC */
59 {1, 0, 400, 400, 3472, 33472, 4173, 34173}, /* DDR2-400 SC */
60 {1, 0, 400, 667, 3443, 33443, 3996, 33996}, /* DDR2-667 SC */
61 {1, 0, 400, 800, 3430, 33430, 3946, 33946}, /* DDR2-800 SC */
65 {0, 0, 800, 400, 3438, 33438, 4065, 34065}, /* DDR2-400 SC */
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/ti/
H A Demif.txt5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
/linux/drivers/edac/
H A Di82975x_edac.c188 * DDR2 SDRAM
419 dimm->mtype = MEM_DDR2; /* I82975x supports only DDR2 */ in i82975x_init_csrows()
436 * (shows 13-5-5-5 for 800-DDR2) in i82975x_print_dram_timings()

123