| /linux/arch/arm/mach-davinci/ |
| H A D | sleep.S | 12 #include "ddr2.h"
34 * r0: contains virtual base for DDR2 controller
35 * r1: contains virtual base for DDR2 Power and Sleep controller (PSC)
36 * r2: contains PSC number for DDR2
37 * r3: contains virtual base DDR2 PLL controller
66 /* Disable DDR2 LPSC */
138 /* Start 2x clock to DDR2 */
146 /* Enable DDR2 LPSC */
168 * Disables or Enables DDR2 LPSC
171 * r1: contains virtual base for DDR2 Power and Sleep controller (PSC)
[all …]
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| H A D | devices-da8xx.c | 65 pr_warn("%s: Unable to map DDR2 controller", __func__); in da8xx_get_mem_ctlr()
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| /linux/drivers/soc/atmel/ |
| H A D | soc.c | 96 "sam9x60 64MiB DDR2 SiP", "sam9x60"),
99 "sam9x60 128MiB DDR2 SiP", "sam9x60"),
116 "sam9x75 16MB DDR2 SiP", "sam9x7"),
119 "sam9x75 64MB DDR2 SiP", "sam9x7"),
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| /linux/drivers/memory/ |
| H A D | Kconfig | 97 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
192 bool "Texas Instruments da8xx DDR2/mDDR driver"
195 This driver is for the DDR2/mDDR Memory Controller present on
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| H A D | da8xx-ddrctl.c | 3 * TI da8xx DDR2/mDDR controller driver
165 MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver");
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| H A D | ti-emif-sram-pm.S | 226 * disabled for DDR2 no harm in restoring the
232 /* Write to sdcfg last for DDR2 only */
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | sddr2.c | 47 /* The following are available in some, but not all DDR2 docs */
55 /* The following are available in some, but not all DDR2 docs */
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca9.dts | 245 /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
254 /* DDR2 SDRAM VTT termination voltage */
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| /linux/drivers/clk/ralink/ |
| H A D | clk-mtmips.c | 505 u32 ddr2; in rt3883_bus_recalc_rate() local
509 ddr2 = t & RT3883_SYSCFG0_DRAM_TYPE_DDR2; in rt3883_bus_recalc_rate()
513 return (ddr2) ? 125000000 : 83000000; in rt3883_bus_recalc_rate()
515 return (ddr2) ? 128000000 : 96000000; in rt3883_bus_recalc_rate()
517 return (ddr2) ? 160000000 : 120000000; in rt3883_bus_recalc_rate()
519 return (ddr2) ? 166000000 : 125000000; in rt3883_bus_recalc_rate()
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| /linux/arch/mips/ralink/ |
| H A D | mt7620.c | 67 pr_info("Board has DDR2\n"); in mt7620_dram_init()
87 pr_info("Board has DDR2\n"); in mt7628_dram_init()
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| /linux/arch/mips/pic32/ |
| H A D | Kconfig | 28 internally packaged DDR2 memory up to 128MB.
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| /linux/Documentation/devicetree/bindings/arm/bcm/ |
| H A D | brcm,hr2.yaml | 12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ti,da8xx-ddrctl.yaml | 7 title: Texas Instruments da8xx DDR2/mDDR memory controller
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| H A D | nvidia,tegra20-emc.yaml | 19 standard protocols: DDR1, LPDDR2 and DDR2.
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| /linux/include/linux/ |
| H A D | edac.h | 161 * @MEM_DDR2: DDR2 RAM, as described at JEDEC JESD79-2F.
164 * @MEM_FB_DDR2: Fully-Buffered DDR2, as described at JEDEC Std No. 205
168 * @MEM_RDDR2: Registered DDR2 RAM
169 * This is a variant of the DDR2 memories.
172 * created to compete with DDR2. Weren't used on any
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| /linux/arch/arm/boot/dts/nxp/mxs/ |
| H A D | imx28-eukrea-mbmx287lc.dts | 8 * Module contains : i.MX287 + 128MB DDR2 + NAND + 2 x Ethernet PHY + RTC
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| H A D | imx28-eukrea-mbmx283lc.dts | 8 * Module contains : i.MX282 + 64MB DDR2 + NAND + Ethernet PHY + RTC
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| /linux/drivers/bcma/ |
| H A D | scan.c | 41 { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
90 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
102 { BCMA_CORE_CMEM, "CNDS DDR2/3 memory controller" },
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | brcm,bcm2835-dsi0.yaml | 44 # - description: The DSI DDR2 clock
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| /linux/Documentation/driver-api/memory-devices/ |
| H A D | ti-emif.rst | 30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | b4860si-post.dtsi | 78 dev-handle = <&ddr2>;
238 ddr2: memory-controller@9000 { label
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| H A D | p5020si-post.dtsi | 235 dev-handle = <&ddr2>;
285 ddr2: memory-controller@9000 { label
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| H A D | p5040si-post.dtsi | 180 dev-handle = <&ddr2>;
240 ddr2: memory-controller@9000 { label
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| /linux/Documentation/devicetree/bindings/memory-controllers/ti/ |
| H A D | emif.txt | 5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
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| /linux/drivers/edac/ |
| H A D | i82975x_edac.c | 188 * DDR2 SDRAM
419 dimm->mtype = MEM_DDR2; /* I82975x supports only DDR2 */ in i82975x_init_csrows()
436 * (shows 13-5-5-5 for 800-DDR2) in i82975x_print_dram_timings()
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