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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,admfm2000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kim Seer Paller <kimseer.paller@analog.com>
22 - adi,admfm2000
24 '#address-cells':
27 '#size-cells':
31 "^channel@[0-1]$":
44 adi,mixer-mode:
52 switch-gpios:
[all …]
/linux/drivers/slimbus/
H A Dslimbus.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2011-2017, The Linux Foundation
38 #define SLIM_HEADER_GET_MT(b) ((b >> SLIM_MSG_MT_SHIFT) & SLIM_MSG_MT_MASK) argument
39 #define SLIM_HEADER_GET_RL(b) ((b >> SLIM_MSG_RL_SHIFT) & SLIM_MSG_RL_MASK) argument
40 #define SLIM_HEADER_GET_MC(b) ((b >> SLIM_MSG_MC_SHIFT) & SLIM_MSG_MC_MASK) argument
41 #define SLIM_HEADER_GET_DT(b) ((b >> SLIM_MSG_DT_SHIFT) & SLIM_MSG_DT_MASK) argument
91 * struct slim_framer - Represents SLIMbus framer.
94 * Manager is responsible for framer hand-over.
111 * struct slim_msg_txn - Message to be sent by the controller.
120 * (relevant for message-codes involving read operation)
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/linux/arch/m68k/ifpsp060/src/
H A Dfplsp.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
276 set LV, -LOCAL_SIZE # stack offset
285 set EXC_AREGS, -68 # offset of all address regs
286 set EXC_DREGS, -100 # offset of all data regs
287 set EXC_FPREGS, -36 # offset of all fp regs
503 set rn_mode, 0x0 # round-to-nearest
504 set rz_mode, 0x1 # round-to-zero
505 set rm_mode, 0x2 # round-tp-minus-infinity
506 set rp_mode, 0x3 # round-to-plus-infinity
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/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dwc.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
20 /* data path - accessed per cqe */
23 /* data path - accessed per napi poll */
50 struct mlx5_core_cq *mcq = &cq->mcq; in mlx5_wc_create_cqwq()
55 err = mlx5_cqwq_create(mdev, &param, cqc, &cq->wq, &cq->wq_ctrl); in mlx5_wc_create_cqwq()
59 mcq->cqe_sz = 64; in mlx5_wc_create_cqwq()
60 mcq->set_ci_db = cq->wq_ctrl.db.db; in mlx5_wc_create_cqwq()
61 mcq->arm_db = cq->wq_ctrl.db.db + 1; in mlx5_wc_create_cqwq()
63 for (i = 0; i < mlx5_cqwq_get_size(&cq->wq); i++) { in mlx5_wc_create_cqwq()
64 struct mlx5_cqe64 *cqe = mlx5_cqwq_get_wqe(&cq->wq, i); in mlx5_wc_create_cqwq()
[all …]
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c1 // SPDX-License-Identifier: GPL-2.0+
29 #include <linux/soc/samsung/exynos-pmu.h>
30 #include <linux/soc/samsung/exynos-regs-pmu.h>
32 #include "pinctrl-samsung.h"
33 #include "pinctrl-exynos.h"
67 if (bank->eint_mask_offset) in exynos_irq_mask()
68 reg_mask = bank->pctl_offset + bank->eint_mask_offset; in exynos_irq_mask()
70 reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
72 if (clk_enable(bank->drvdata->pclk)) { in exynos_irq_mask()
73 dev_err(bank->gpio_chip.parent, in exynos_irq_mask()
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/linux/drivers/platform/surface/aggregator/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Provides access to a SAM-over-SSH connected EC via a controller device.
10 * Copyright (C) 2019-2022 Maximilian Luz <luzmaximilian@gmail.com>
37 /* -- Static controller reference. ------------------------------------------ */
47 * ssam_get_controller() - Get reference to SSAM controller.
57 struct ssam_controller *ctrl; in ssam_get_controller() local
61 ctrl = __ssam_controller; in ssam_get_controller()
62 if (!ctrl) in ssam_get_controller()
65 if (WARN_ON(!kref_get_unless_zero(&ctrl->kref))) in ssam_get_controller()
66 ctrl = NULL; in ssam_get_controller()
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/linux/drivers/macintosh/
H A Dwindfarm_smu_controls.c1 // SPDX-License-Identifier: GPL-2.0-only
50 struct wf_control ctrl; member
52 #define to_smu_fan(c) container_of(c, struct smu_fan_control, ctrl)
78 return -EINVAL; in smu_set_fan()
120 if (value < fct->min) in smu_fan_set()
121 value = fct->min; in smu_fan_set()
122 if (value > fct->max) in smu_fan_set()
123 value = fct->max; in smu_fan_set()
124 fct->value = value; in smu_fan_set()
126 return smu_set_fan(fct->fan_type, fct->reg, value); in smu_fan_set()
[all …]
H A Dwindfarm_fcu_controls.c1 // SPDX-License-Identifier: GPL-2.0-only
44 * what Darwin -apparently- does based on observed behaviour.
68 struct wf_control ctrl; member
80 struct wf_fcu_fan *fan = ct->priv; in wf_fcu_fan_release()
82 kref_put(&fan->fcu_priv->ref, wf_fcu_release); in wf_fcu_fan_release()
91 mutex_lock(&pv->lock); in wf_fcu_read_reg()
96 nw = i2c_master_send(pv->i2c, buf, 1); in wf_fcu_read_reg()
97 if (nw > 0 || (nw < 0 && nw != -EIO) || tries >= 100) in wf_fcu_read_reg()
109 nr = i2c_master_recv(pv->i2c, buf, nb); in wf_fcu_read_reg()
110 if (nr > 0 || (nr < 0 && nr != -ENODEV) || tries >= 100) in wf_fcu_read_reg()
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/linux/drivers/platform/surface/
H A Dsurface_acpi_notify.c1 // SPDX-License-Identifier: GPL-2.0+
6 * (SSAM/SAM) requests and back, specifically SAM-over-SSH. Translates SSAM
11 * Copyright (C) 2019-2022 Maximilian Luz <luzmaximilian@gmail.com>
29 struct ssam_controller *ctrl; member
42 /* -- dGPU notifier interface. ---------------------------------------------- */
64 status = -EBUSY; in san_set_rqsg_interface_device()
71 * san_client_link() - Link client as consumer to SAN device.
83 * Return: Returns zero on success, %-ENXIO if the SAN interface has not been
84 * set up yet, and %-ENOMEM if device link creation failed.
95 return -ENXIO; in san_client_link()
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/linux/drivers/nvme/target/
H A Dpci-epf.c1 // SPDX-License-Identifier: GPL-2.0
7 * REDS Institute, HEIG-VD, HES-SO, Switzerland
19 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
31 * allow up to 128 page-sized segments. For the maximum allowed,
36 (NVMET_PCI_EPF_MAX_SEGS << (PAGE_SHIFT - 10))
84 struct nvmet_pci_epf_ctrl *ctrl; member
129 struct nvmet_pci_epf_ctrl *ctrl; member
209 struct nvmet_pci_epf_ctrl ctrl; member
226 static inline u32 nvmet_pci_epf_bar_read32(struct nvmet_pci_epf_ctrl *ctrl, in nvmet_pci_epf_bar_read32() argument
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/linux/drivers/pci/controller/
H A Dpcie-rockchip-ep.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Simon Xue <xxm@rock-chips.com>
18 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
24 #include "pcie-rockchip.h"
27 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
81 int num_pass_bits = fls64(pci_addr ^ (pci_addr + size - 1)); in rockchip_pcie_ep_ob_atu_num_bits()
98 addr0 = ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) | in rockchip_pcie_prog_ep_ob_atu()
119 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_write_header()
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/linux/net/bluetooth/bnep/
H A Dbnep.h1 /* SPDX-License-Identifier: GPL-2.0-only */
75 __u8 ctrl; member
82 __u8 ctrl; member
89 __u8 ctrl; member
100 #define BNEPCONNADD _IOW('B', 200, int)
101 #define BNEPCONNDEL _IOW('B', 201, int)
102 #define BNEPGETCONNLIST _IOR('B', 210, int)
103 #define BNEPGETCONNINFO _IOR('B', 211, int)
104 #define BNEPGETSUPPFEAT _IOR('B', 212, int)
/linux/drivers/pci/controller/cadence/
H A Dpcie-cadence-ep.c1 // SPDX-License-Identifier: GPL-2.0
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
11 #include <linux/pci-epc.h>
15 #include "pcie-cadence.h"
33 fn = fn + first_vf_offset + ((vfn - 1) * stride); in cdns_pcie_get_fn_from_vfn()
42 struct cdns_pcie *pcie = &ep->pcie; in cdns_pcie_ep_write_header()
48 dev_err(&epc->dev, "Only Virtual Function #1 has deviceID\n"); in cdns_pcie_ep_write_header()
49 return -EINVAL; in cdns_pcie_ep_write_header()
52 cdns_pcie_ep_fn_writew(pcie, fn, reg, hdr->deviceid); in cdns_pcie_ep_write_header()
56 cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); in cdns_pcie_ep_write_header()
[all …]
/linux/arch/arm/mm/
H A Dproc-v7.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7.S
9 #include <linux/arm-smccc.h>
15 #include <asm/asm-offsets.h>
17 #include <asm/pgtable-hwdef.h>
20 #include "proc-macros.S"
23 #include "proc-v7-3level.S"
25 #include "proc-v7-2level.S"
28 .arch armv7-a
35 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
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/linux/drivers/infiniband/hw/mlx5/
H A Dwr.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
20 /* get_sq_edge - Get the next nearby edge.
27 * @sq - SQ buffer.
28 * @idx - Stride index in the SQ buffer.
38 (&sq->fbc, in get_sq_edge()
39 mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); in get_sq_edge()
44 /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the
47 * @seg: Current WQE position (16B aligned).
48 * @wqe_sz: Total current WQE size [16B].
59 idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); in handle_post_send_edge()
[all …]
/linux/drivers/xen/events/
H A Devents_fifo.c2 * Xen event channels (FIFO-based ABI)
49 #include <xen/xen-ops.h>
75 #define EVTCHN_FIFO_BIT(b, w) \ argument
76 (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
81 #define EVTCHN_FIFO_BIT(b, w) EVTCHN_FIFO_ ##b argument
112 q->head[i] = 0; in init_control_block()
149 return -EINVAL; in evtchn_fifo_setup()
160 ret = -ENOMEM; in evtchn_fifo_setup()
191 /* no-op */ in evtchn_fifo_bind_to_cpu()
273 static void consume_one_event(unsigned cpu, struct evtchn_loop_ctrl *ctrl, in consume_one_event() argument
[all …]
/linux/drivers/usb/renesas_usbhs/
H A Dmod_gadget.c1 // SPDX-License-Identifier: GPL-1.0+
10 #include <linux/dma-mapping.h>
61 struct usb_ctrlrequest *ctrl);
63 struct usb_ctrlrequest *ctrl);
65 struct usb_ctrlrequest *ctrl);
78 ((i) < (g)->uep_size) && ((pos) = (g)->uep + (i)); \
94 #define usbhsg_gpriv_to_dev(gp) usbhs_priv_to_dev((gp)->mod.priv)
95 #define usbhsg_gpriv_to_priv(gp) ((gp)->mod.priv)
96 #define usbhsg_gpriv_to_dcp(gp) ((gp)->uep)
97 #define usbhsg_gpriv_to_nth_uep(gp, i) ((gp)->uep + i)
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/linux/arch/arm64/boot/dts/renesas/
H A Drzg3e-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 * 0 - SD0 is connected to eMMC (default)
14 * 1 - SD0 is connected to uSD0 card
17 * 0 - Select Misc. Signals routing
18 * 1 - Select LCD
21 * 0 - Select CAN routing
22 * 1 - Select PDM
26 compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
42 reg_1p8v: regulator-1p8v {
43 compatible = "regulator-fixed";
[all …]
/linux/drivers/mtd/nand/raw/
H A Dcafe_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <linux/dma-mapping.h>
101 #define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)
102 #define cafe_writel(cafe, datum, addr) writel(datum, (cafe)->mmio + CAFE_##addr)
112 cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n", in cafe_device_ready()
124 if (cafe->usedma) in cafe_write_buf()
125 memcpy(cafe->dmabuf + cafe->datalen, buf, len); in cafe_write_buf()
127 memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len); in cafe_write_buf()
129 cafe->datalen += len; in cafe_write_buf()
131 cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n", in cafe_write_buf()
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/linux/drivers/isdn/hardware/mISDN/
H A Davmfritz.c1 // SPDX-License-Identifier: GPL-2.0-only
112 u32 ctrl; member
114 } ctrl; member
140 card->isac.dch.debug = debug; in _set_debug()
141 card->bch[0].debug = debug; in _set_debug()
142 card->bch[1].debug = debug; in _set_debug()
176 outb(idx, fc->addr + CHIP_INDEX); in ReadISAC_V1()
177 return inb(fc->addr + CHIP_WINDOW + (offset & 0xf)); in ReadISAC_V1()
186 outb(idx, fc->addr + CHIP_INDEX); in WriteISAC_V1()
187 outb(value, fc->addr + CHIP_WINDOW + (offset & 0xf)); in WriteISAC_V1()
[all …]
/linux/drivers/pwm/
H A Dpwm-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
45 unsigned long ctrl; member
66 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
67 u32 enable_conf = pc->data->enable_conf; in rockchip_pwm_get_state()
73 ret = clk_enable(pc->pclk); in rockchip_pwm_get_state()
77 ret = clk_enable(pc->clk); in rockchip_pwm_get_state()
81 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_get_state()
83 tmp = readl_relaxed(pc->base + pc->data->regs.period); in rockchip_pwm_get_state()
85 state->period = DIV_U64_ROUND_UP(tmp, clk_rate); in rockchip_pwm_get_state()
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-cmos.txt5 - compatible : "motorola,mc146818"
6 - reg : should contain registers location and length.
9 - interrupts : should contain interrupt.
10 - ctrl-reg : Contains the initial value of the control register also
11 called "Register B".
12 - freq-reg : Contains the initial value of the frequency register also
15 "Register A" and "B" are usually initialized by the firmware (BIOS for
23 interrupt-parent = <&ioapic1>;
24 ctrl-reg = <2>;
25 freq-reg = <0x26>;
/linux/drivers/usb/gadget/function/
H A Df_uac1_legacy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * f_audio.c -- USB Audio class function driver
26 * We have two interfaces- AudioControl and AudioStreaming
33 /* B.3.1 Standard AC Interface Descriptor */
52 /* B.3.2 Class-Specific AC Interface Descriptor */
127 /* B.4.1 Standard AS Interface Descriptor */
146 /* B.4.2 Class-Specific AS Interface Descriptor */
179 /* Class-specific AS ISO OUT Endpoint Descriptor */
230 .language = 0x0409, /* en-us */
243 /*-------------------------------------------------------------------------*/
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/linux/drivers/clk/mediatek/
H A Dclk-mt8196-mcu.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/mediatek,mt8196-clock.h>
17 #include "clk-mtk.h"
18 #include "clk-pll.h"
72 PLL(CLK_CPBL_ARMPLL_BL, "armpll-bl", ARMPLL_BL_CON0, ARMPLL_BL_CON0, 0,
77 PLL(CLK_CPB_ARMPLL_B, "armpll-b", ARMPLL_B_CON0, ARMPLL_B_CON0, 0, 0,
82 PLL(CLK_CPLL_ARMPLL_LL, "armpll-ll", ARMPLL_LL_CON0, ARMPLL_LL_CON0, 0,
97 { .compatible = "mediatek,mt8196-armpll-bl-pll-ctrl",
99 { .compatible = "mediatek,mt8196-armpll-b-pll-ctrl",
101 { .compatible = "mediatek,mt8196-armpll-ll-pll-ctrl",
[all …]
/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
88 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
91 int b; in rk3568_iodomain_write() local
93 switch (supply->idx) { in rk3568_iodomain_write()
97 b = supply->idx; in rk3568_iodomain_write()
98 val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b)); in rk3568_iodomain_write()
99 b = supply->idx + 4; in rk3568_iodomain_write()
100 val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0); in rk3568_iodomain_write()
[all …]

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