Lines Matching +full:ctrl +full:- +full:b
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
45 unsigned long ctrl; member
66 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
67 u32 enable_conf = pc->data->enable_conf; in rockchip_pwm_get_state()
73 ret = clk_enable(pc->pclk); in rockchip_pwm_get_state()
77 ret = clk_enable(pc->clk); in rockchip_pwm_get_state()
81 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_get_state()
83 tmp = readl_relaxed(pc->base + pc->data->regs.period); in rockchip_pwm_get_state()
85 state->period = DIV_U64_ROUND_UP(tmp, clk_rate); in rockchip_pwm_get_state()
87 tmp = readl_relaxed(pc->base + pc->data->regs.duty); in rockchip_pwm_get_state()
89 state->duty_cycle = DIV_U64_ROUND_UP(tmp, clk_rate); in rockchip_pwm_get_state()
91 val = readl_relaxed(pc->base + pc->data->regs.ctrl); in rockchip_pwm_get_state()
92 state->enabled = (val & enable_conf) == enable_conf; in rockchip_pwm_get_state()
94 if (pc->data->supports_polarity && !(val & PWM_DUTY_POSITIVE)) in rockchip_pwm_get_state()
95 state->polarity = PWM_POLARITY_INVERSED; in rockchip_pwm_get_state()
97 state->polarity = PWM_POLARITY_NORMAL; in rockchip_pwm_get_state()
99 clk_disable(pc->clk); in rockchip_pwm_get_state()
100 clk_disable(pc->pclk); in rockchip_pwm_get_state()
109 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_config()
112 u32 ctrl; in rockchip_pwm_config() local
114 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_config()
121 tmp = mul_u64_u64_div_u64(clk_rate, state->period, prescaled_ns); in rockchip_pwm_config()
126 tmp = mul_u64_u64_div_u64(clk_rate, state->duty_cycle, prescaled_ns); in rockchip_pwm_config()
135 ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); in rockchip_pwm_config()
136 if (pc->data->supports_lock) { in rockchip_pwm_config()
137 ctrl |= PWM_LOCK_EN; in rockchip_pwm_config()
138 writel_relaxed(ctrl, pc->base + pc->data->regs.ctrl); in rockchip_pwm_config()
141 writel(period_ticks, pc->base + pc->data->regs.period); in rockchip_pwm_config()
142 writel(duty_ticks, pc->base + pc->data->regs.duty); in rockchip_pwm_config()
144 if (pc->data->supports_polarity) { in rockchip_pwm_config()
145 ctrl &= ~PWM_POLARITY_MASK; in rockchip_pwm_config()
146 if (state->polarity == PWM_POLARITY_INVERSED) in rockchip_pwm_config()
147 ctrl |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE; in rockchip_pwm_config()
149 ctrl |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE; in rockchip_pwm_config()
157 if (pc->data->supports_lock) in rockchip_pwm_config()
158 ctrl &= ~PWM_LOCK_EN; in rockchip_pwm_config()
160 writel(ctrl, pc->base + pc->data->regs.ctrl); in rockchip_pwm_config()
168 u32 enable_conf = pc->data->enable_conf; in rockchip_pwm_enable()
173 ret = clk_enable(pc->clk); in rockchip_pwm_enable()
178 val = readl_relaxed(pc->base + pc->data->regs.ctrl); in rockchip_pwm_enable()
185 writel_relaxed(val, pc->base + pc->data->regs.ctrl); in rockchip_pwm_enable()
188 clk_disable(pc->clk); in rockchip_pwm_enable()
201 ret = clk_enable(pc->pclk); in rockchip_pwm_apply()
205 ret = clk_enable(pc->clk); in rockchip_pwm_apply()
212 if (state->polarity != curstate.polarity && enabled && in rockchip_pwm_apply()
213 !pc->data->supports_lock) { in rockchip_pwm_apply()
221 if (state->enabled != enabled) { in rockchip_pwm_apply()
222 ret = rockchip_pwm_enable(chip, pwm, state->enabled); in rockchip_pwm_apply()
228 clk_disable(pc->clk); in rockchip_pwm_apply()
229 clk_disable(pc->pclk); in rockchip_pwm_apply()
244 .ctrl = 0x0c,
257 .ctrl = 0x0c,
271 .ctrl = 0x00,
285 .ctrl = 0x0c,
295 { .compatible = "rockchip,rk2928-pwm", .data = &pwm_data_v1},
296 { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2},
297 { .compatible = "rockchip,vop-pwm", .data = &pwm_data_vop},
298 { .compatible = "rockchip,rk3328-pwm", .data = &pwm_data_v3},
307 u32 enable_conf, ctrl; in rockchip_pwm_probe() local
311 chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*pc)); in rockchip_pwm_probe()
316 pc->base = devm_platform_ioremap_resource(pdev, 0); in rockchip_pwm_probe()
317 if (IS_ERR(pc->base)) in rockchip_pwm_probe()
318 return PTR_ERR(pc->base); in rockchip_pwm_probe()
320 pc->clk = devm_clk_get(&pdev->dev, "pwm"); in rockchip_pwm_probe()
321 if (IS_ERR(pc->clk)) { in rockchip_pwm_probe()
322 pc->clk = devm_clk_get(&pdev->dev, NULL); in rockchip_pwm_probe()
323 if (IS_ERR(pc->clk)) in rockchip_pwm_probe()
324 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk), in rockchip_pwm_probe()
328 count = of_count_phandle_with_args(pdev->dev.of_node, in rockchip_pwm_probe()
329 "clocks", "#clock-cells"); in rockchip_pwm_probe()
331 pc->pclk = devm_clk_get(&pdev->dev, "pclk"); in rockchip_pwm_probe()
333 pc->pclk = pc->clk; in rockchip_pwm_probe()
335 if (IS_ERR(pc->pclk)) in rockchip_pwm_probe()
336 return dev_err_probe(&pdev->dev, PTR_ERR(pc->pclk), "Can't get APB clk\n"); in rockchip_pwm_probe()
338 ret = clk_prepare_enable(pc->clk); in rockchip_pwm_probe()
340 return dev_err_probe(&pdev->dev, ret, "Can't prepare enable PWM clk\n"); in rockchip_pwm_probe()
342 ret = clk_prepare_enable(pc->pclk); in rockchip_pwm_probe()
344 dev_err_probe(&pdev->dev, ret, "Can't prepare enable APB clk\n"); in rockchip_pwm_probe()
350 pc->data = device_get_match_data(&pdev->dev); in rockchip_pwm_probe()
351 chip->ops = &rockchip_pwm_ops; in rockchip_pwm_probe()
353 enable_conf = pc->data->enable_conf; in rockchip_pwm_probe()
354 ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); in rockchip_pwm_probe()
355 enabled = (ctrl & enable_conf) == enable_conf; in rockchip_pwm_probe()
359 dev_err_probe(&pdev->dev, ret, "pwmchip_add() failed\n"); in rockchip_pwm_probe()
365 clk_disable(pc->clk); in rockchip_pwm_probe()
367 clk_disable(pc->pclk); in rockchip_pwm_probe()
372 clk_disable_unprepare(pc->pclk); in rockchip_pwm_probe()
374 clk_disable_unprepare(pc->clk); in rockchip_pwm_probe()
386 clk_unprepare(pc->pclk); in rockchip_pwm_remove()
387 clk_unprepare(pc->clk); in rockchip_pwm_remove()
392 .name = "rockchip-pwm",
400 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");