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/linux/tools/perf/util/
H A Dcpumap.h17 * /sys/devices/system/cpu/cpuX/topology/physical_package_id.
20 /** The die id as read from /sys/devices/system/cpu/cpuX/topology/die_id. */
22 /** The cluster id as read from /sys/devices/system/cpu/cpuX/topology/cluster_id */
24 /** The cache level as read from /sys/devices/system/cpu/cpuX/cache/indexY/level */
28 * /sys/devices/system/cpu/cpuX/cache/indexY/shared_cpu_list
31 /** The core id as read from /sys/devices/system/cpu/cpuX/topology/core_id. */
81 * /sys/devices/system/cpu/cpuX/topology/physical_package_id for the given CPU.
86 * /sys/devices/system/cpu/cpuX/topology/die_id for the given CPU.
91 * /sys/devices/system/cpu/cpuX/topology/cluster_id for the given CPU
96 * /sys/devices/system/cpu/cpuX/topolog
[all...]
H A Dcputopo.h16 * /sys/devices/system/cpu/cpuX/topology/package_cpus_list. From the ABI
23 * /sys/devices/system/cpu/cpuX/topology/die_cpus_list. From the ABI
30 * /sys/devices/system/cpu/cpuX/topology/core_cpus_list. From the ABI
/linux/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c223 * 1 - CPUx L1 and logic lost: MPUSS CSWR
224 * 2 - CPUx L1 and logic lost + GIC lost: MPUSS OSWR
225 * 3 - CPUx L1 and logic lost + GIC + L2 lost: DEVICE OFF
251 * CPUx CSWR is invalid hardware state. Also CPUx OSWR in omap4_enter_lowpower()
254 * CPUx OSWR equivalent to CPUX OFF and hence not supported in omap4_enter_lowpower()
297 * Restore the CPUx power state to ON otherwise CPUx in omap4_enter_lowpower()
300 * secure devices, CPUx does WFI which can result in in omap4_enter_lowpower()
H A Dcpuidle44xx.c244 .desc = "CPUx ON, MPUSS ON"
254 .desc = "CPUx OFF, MPUSS CSWR",
264 .desc = "CPUx OFF, MPUSS OSWR",
281 .desc = "CPUx WFI, MPUSS ON"
291 .desc = "CPUx CSWR, MPUSS CSWR",
H A Domap4-sar-layout.h28 /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK1 */
H A Domap-wakeupgen.c246 /* Save the CPUx interrupt mask for IRQ 0 to 127 */ in omap4_irq_save_context()
253 * Disable the secure interrupts for CPUx. The restore in omap4_irq_save_context()
287 /* Save the CPUx interrupt mask for IRQ 0 to 159 */ in omap5_irq_save_context()
/linux/drivers/clocksource/
H A Dtimer-mediatek-cpux.c3 * MediaTek SoCs CPUX General Purpose Timer handling
24 /* cpux mcusys wrapper */
28 /* cpux */
85 * There are per-cpu interrupts for the CPUX General Purpose Timer
108 WARN(1, "Cannot start CPUX timers.\n"); in mtk_cpux_init()
/linux/tools/power/cpupower/utils/helpers/
H A Dsysfs.c64 * -> cpuX directory exists, but not cpuX/online file in sysfs_is_cpu_online()
89 /* CPUidle idlestate specific /sys/devices/system/cpu/cpuX/cpuidle/ access */
92 /* CPUidle idlestate specific /sys/devices/system/cpu/cpuX/cpuidle/ access */
95 * helper function to check whether a file under "../cpuX/cpuidle/stateX/" dir
120 * fname is a relative path under "cpuX/cpuidle/stateX/" dir
152 * fname is a relative path under "../cpuX/cpuidle/cstateY/" dir
449 /* CPUidle idlestate specific /sys/devices/system/cpu/cpuX/cpuidle/ access */
/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-bananapi-m2-plus-v1.2.dtsi13 reg_vdd_cpux: vdd-cpux {
15 regulator-name = "vdd-cpux";
H A Dsun8i-h2-plus-bananapi-m2-zero.dts61 reg_vdd_cpux: vdd-cpux-regulator {
63 regulator-name = "vdd-cpux";
252 "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36",
H A Dsunxi-libretech-all-h3-it.dtsi89 reg_vdd_cpux: vdd-cpux {
91 regulator-name = "vdd-cpux";
H A Dsun8i-h3-orangepi-one.dts99 reg_vdd_cpux: vdd-cpux-regulator {
101 regulator-name = "vdd-cpux";
H A Dsunxi-libretech-all-h3-cc.dtsi107 reg_vdd_cpux: vdd-cpux {
109 regulator-name = "vdd-cpux";
H A Dsun8i-h3-orangepi-pc.dts185 regulator-name = "vdd-cpux";
188 * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
H A Dsun8i-h3-emlid-neutis-n5h3-devboard.dts20 regulator-name = "vdd-cpux";
/linux/tools/power/cpupower/lib/
H A Dcpuidle.c20 * helper function to check whether a file under "../cpuX/cpuidle/stateX/" dir
46 * fname is a relative path under "cpuX/cpuidle/stateX/" dir
81 * fname is a relative path under "../cpuX/cpuidle/cstateY/" dir
387 /* CPUidle idlestate specific /sys/devices/system/cpu/cpuX/cpuidle/ access */
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80.h28 /* The CPUX clocks are exported */
H A Dccu-sun50i-a100.h39 /* CPUX clock exported for DVFS */
H A Dccu-sun8i-a83t.h30 /* The CPUX clocks are exported */
H A Dccu-sun8i-h3.h33 /* The CPUX clock is exported */
H A Dccu-sun50i-h6.h36 /* CPUX clock exported for DVFS */
H A Dccu-sun8i-a23-a33.h35 /* The CPUX clock is exported */
H A Dccu-sun6i-a31.h41 /* The CPUX clock is exported */
H A Dccu-sun8i-a23.c39 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
170 "pll-cpux" , "pll-cpux" };
171 static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents,
174 static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5-emlid-neutis-n5-devboard.dts31 regulator-name = "vdd-cpux";

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