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/freebsd/lib/libpmc/pmu-events/arch/x86/
H A Dmapfile.csv2 GenuineIntel-6-56,v5,broadwellde,core
3 GenuineIntel-6-3D,v17,broadwell,core
4 GenuineIntel-6-47,v17,broadwell,core
5 GenuineIntel-6-4F,v10,broadwellx,core
6 GenuineIntel-6-1C,v4,bonnell,core
7 GenuineIntel-6-26,v4,bonnell,core
8 GenuineIntel-6-27,v4,bonnell,core
9 GenuineIntel-6-36,v4,bonnell,core
10 GenuineIntel-6-35,v4,bonnell,core
11 GenuineIntel-6-5C,v8,goldmont,core
[all...]
/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_radio_2055.h34 #define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
35 #define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
36 #define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
37 #define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
38 #define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
39 #define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
40 #define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
41 #define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
42 #define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
43 #define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
[all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/
H A Dmapfile.csv11 # Type is core, uncore etc
15 0x00000000410fd020,v1,arm/cortex-a34,core
16 0x00000000410fd030,v1,arm/cortex-a53,core
17 0x00000000420f1000,v1,arm/cortex-a53,core
18 0x00000000410fd040,v1,arm/cortex-a35,core
19 0x00000000410fd050,v1,arm/cortex-a55,core
20 0x00000000410fd060,v1,arm/cortex-a65,core
21 0x00000000410fd070,v1,arm/cortex-a57-a72,core
22 0x00000000410fd080,v1,arm/cortex-a57-a72,core
23 0x00000000410fd090,v1,arm/cortex-a73,core
[all …]
/freebsd/stand/lua/
H A Dmenu.lua31 local core = require("core")
41 entry_type = core.MENU_RETURN,
75 [core.MENU_ENTRY] = function(_, entry)
79 [core.MENU_CAROUSEL_ENTRY] = function(_, entry)
93 [core.MENU_SUBMENU] = function(_, entry)
96 [core.MENU_RETURN] = function(_, entry)
111 entry_type = core.MENU_CAROUSEL_ENTRY,
113 items = core.bootenvList,
139 entry_type = core.MENU_ENTRY,
141 return core.isRewinded() == false
[all …]
H A Dcore.lua33 local core = {}
53 default_acpi = core.getACPI()
57 core.setACPI(default_acpi)
58 core.setSingleUser(default_single_user)
59 core.setVerbose(default_verbose)
93 core.KEY_BACKSPACE = 8
94 core.KEY_ENTER = 13
95 core.KEY_DELETE = 127
99 core.KEYSTR_ESCAPE = "\027"
100 core.KEYSTR_CSI = core.KEYSTR_ESCAPE .. "["
[all …]
H A Dmenu.lua.896 .Ic core.MENU_SEPARATOR
112 .Ic core.MENU_SEPARATOR .
115 .Xr core.lua 8 .
117 .Bl -tag -width core.MENU_CAROUSEL_ENTRY -offset indent
118 .It Ic core.MENU_RETURN
127 .It Ic core.MENU_ENTRY
132 .It Ic core.MENU_SEPARATOR
136 .It Ic core.MENU_SUBMENU
142 .It Ic core.MENU_CAROUSEL_ENTRY
174 local core = require("core")
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmvebu-core-clock.txt1 * Core Clock bindings for Marvell MVEBU SoCs
3 Marvell MVEBU SoCs usually allow to determine core clock frequencies by
4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
53 "marvell,armada-370-core-clock" - For Armada 370 SoC core clocks
54 "marvell,armada-375-core-clock" - For Armada 375 SoC core clocks
55 "marvell,armada-380-core-clock" - For Armada 380/385 SoC core clocks
56 "marvell,armada-390-core-clock" - For Armada 39x SoC core clocks
57 "marvell,armada-xp-core-clock" - For Armada XP SoC core clocks
58 "marvell,mv98dx3236-core-clock" - For 98dx3236 family SoC core clocks
59 "marvell,dove-core-clock" - for Dove SoC core clocks
[all …]
/freebsd/lib/libprocstat/
H A Dcore.c48 #include "core.h"
78 static bool core_offset(struct procstat_core *core, off_t offset);
79 static bool core_read(struct procstat_core *core, void *buf, size_t len);
80 static ssize_t core_read_mem(struct procstat_core *core, void *buf,
82 static void *get_args(struct procstat_core *core, vm_offset_t psstrings,
88 struct procstat_core *core; in procstat_core_open() local
118 warnx("%s is not a CORE file", filename); in procstat_core_open()
137 core = malloc(sizeof(struct procstat_core)); in procstat_core_open()
138 if (core == NULL) { in procstat_core_open()
142 core->pc_magic = PROCSTAT_CORE_MAGIC; in procstat_core_open()
[all …]
/freebsd/lib/libpmc/
H A Dpmc.core.328 .Nm pmc.core
31 .Tn Core Solo
33 .Tn Core Duo
41 .Tn "Core Solo"
43 .Tn "Core Duo"
112 Events that require core-specificity to be specified use a
114 .Dq Li core= Ns Ar value ,
122 Measure event conditions on this core.
182 Core PMCs support the following events:
271 .It Li Bus_Locks_Clocks Op ,core= Ns Ar core
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H A Dpmc.atom.3120 Events that require core-specificity to be specified use a
122 .Dq Li core= Ns Ar core ,
124 .Ar core
130 Measure event conditions on this core.
324 .It Li BUSQ_EMPTY Op ,core= Ns Ar core
326 The number of cycles during which the core did not have any pending
332 .It Li BUS_DATA_RCV Op ,core= Ns Ar core
353 .It Li BUS_IO_WAIT Op ,core= Ns Ar core
355 The number of core cycles during which I/O requests wait in the bus
359 .Op ,core= Ns Ar core
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H A Dpmc.core2.3119 Events that require core-specificity to be specified use a
121 .Dq Li core= Ns Ar core ,
123 .Ar core
129 Measure event conditions on this core.
320 .It Li BUSQ_EMPTY Op ,core= Ns Ar core
322 The number of cycles during which the core did not have any pending
327 .It Li BUS_DATA_RCV Op ,core= Ns Ar core
344 .It Li BUS_IO_WAIT Op ,core= Ns Ar core
346 The number of core cycles during which I/O requests wait in the bus
350 .Op ,core= Ns Ar core
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/freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/
H A Duncore-cache.json163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so…
168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s…
173 "BriefDescription": "An external snoop hits a modified line in some processor core.",
178 "PublicDescription": "An external snoop hits a modified line in some processor core.",
183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i…
198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line …
203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.",
208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/
H A Duncore-cache.json163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so…
168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s…
173 "BriefDescription": "An external snoop hits a modified line in some processor core.",
178 "PublicDescription": "An external snoop hits a modified line in some processor core.",
183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i…
198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line …
203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.",
208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/haswell/
H A Duncore-cache.json163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so…
168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s…
173 "BriefDescription": "An external snoop hits a modified line in some processor core.",
178 "PublicDescription": "An external snoop hits a modified line in some processor core.",
183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i…
198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line …
203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.",
208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.",
[all …]
H A Duncore.json7 "BriefDescription": "An external snoop misses in some processor core.",
8 "PublicDescription": "An external snoop misses in some processor core.",
19 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
20 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
31 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c…
32 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor
43 "BriefDescription": "An external snoop hits a non-modified line in some processor core.",
44 "PublicDescription": "An external snoop hits a non-modified line in some processor core.",
55 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
56 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
[all …]
/freebsd/sys/dev/bhnd/bcma/
H A Dbcma_erom.c55 * The EROM core address can be found at BCMA_CC_EROM_ADDR within the
58 * core descriptor records.
60 * The final core descriptor is followed by a 32-bit BCMA_EROM_TABLE_EOF (0xF)
89 struct bhnd_core_info *core);
92 struct bcma_erom_core *core);
100 static void bcma_erom_to_core_info(const struct bcma_erom_core *core,
125 return "core"; in bcma_erom_entry_type_name()
170 * core */ in bcma_erom_probe()
202 struct bhnd_core_info *core) in bcma_erom_lookup_core() argument
206 /* Search for the first matching core */ in bcma_erom_lookup_core()
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/freebsd/usr.sbin/crashinfo/
H A Dcrashinfo.833 .Nd "analyze a core dump of the operating system"
39 .Op Ar core
43 utility analyzes a core dump saved by
46 the core dump.
47 For a given core dump file named
50 .Pa core.txt.XX .
54 analyzes the most recent core dump in the core dump directory.
55 A specific core dump may be specified via either the
56 .Ar core
62 has located a core dump,
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dti,c64x+megamod-pic.txt4 * C64X+ Core Interrupt Controller
6 The core interrupt controller provides 16 prioritized interrupts to the
7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
9 sources coming from outside the core.
13 - compatible: Should be "ti,c64x+core-pic";
18 Single cell specifying the core interrupt priority level (4-15) where
26 compatible = "ti,c64x+core-pic";
35 may be cascaded into the core interrupt controller. The megamodule PIC
36 has a total of 12 outputs cascading into the core interrupt controller.
37 One for each core interrupt priority level. In addition to the combined
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A Duncore.json7 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
8 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
19 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c…
20 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor
31 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
32 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
43 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
44 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
175 …"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is def…
176 …"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is de…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A Duncore.json7 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
8 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic…
19 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c…
20 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor
31 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
32 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a …
43 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
44 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits …
187 …"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is def…
188 …"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is de…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A Dcache.json23 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand …
24 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o…
35 …processor's data cache was reloaded from a localtion other than the local core's L2 due to a deman…
36 …processor's data cache was reloaded from a localtion other than the local core's L2 due to either …
41 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
42 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit s…
47 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch co…
48 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch c…
53 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without disp…
54 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dis…
[all …]
/freebsd/sys/dev/bhnd/siba/
H A Dsiba_erom.c73 bhnd_addr_t base_addr; /**< address of first core */
74 u_int ncores; /**< core count */
98 /* Initialize I/O context, assuming at least the first core is mapped */ in siba_erom_probe()
111 * Verify the first core's IDHIGH/IDLOW identification. in siba_erom_probe()
113 * The core must be a Broadcom core, but must *not* be in siba_erom_probe()
114 * a chipcommon core; those shouldn't be hinted. in siba_erom_probe()
116 * The first core on EXTIF-equipped devices varies, but on the in siba_erom_probe()
117 * BCM4710, it's a SDRAM core (0x803). in siba_erom_probe()
168 /* Attempt to map the full core enumeration space */ in siba_erom_init()
204 * @param core_idx Core index.
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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/
H A Dmarked.json10 …1 page walk cache from beyond the core's L3 data cache. The source could be local/remote/distant m…
20 …age Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same ch…
35 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with disp…
45 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
50 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
70 …age Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the sam…
80 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without c…
85 …sor's Instruction cache was reloaded from a location other than the local core's L3 due to a instr…
95 …e Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the sam…
100 …age Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the sam…
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dnetbsd53 0 name netbsd-core
66 0 belong&0377777777 041400507 a.out NetBSD/i386 core
67 >0 use netbsd-core
78 0 belong&0377777777 041600507 a.out NetBSD/m68k core
79 >0 use \^netbsd-core
90 0 belong&0377777777 042000507 a.out NetBSD/m68k4k core
91 >0 use \^netbsd-core
102 0 belong&0377777777 042200507 a.out NetBSD/ns32532 core
103 >0 use netbsd-core
105 0 belong&0377777777 045200507 a.out NetBSD/powerpc core
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Dskx-metrics.json4 "MetricExpr": "IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)",
7 …dersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetc…
11 …"MetricExpr": "IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CL…
14 …dersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetc…
33 …"MetricExpr": "1 - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) - ( UOPS_ISSUED.A…
36core where the out-of-order scheduler dispatches ready uops into their respective execution units;…
40 …"MetricExpr": "1 - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + C…
43core where the out-of-order scheduler dispatches ready uops into their respective execution units;…
61CORE / (4 * CPU_CLK_UNHALTED.THREAD)) * ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRA…
67CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK…
[all …]

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