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Searched full:clk_top_axi_sel (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,mt7622-cir.yaml52 clocks = <&infracfg CLK_INFRA_IRRX>, <&topckgen CLK_TOP_AXI_SEL>;
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629.dtsi267 assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>;
319 assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>,
388 <&topckgen CLK_TOP_AXI_SEL>,
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dmt7629-clk.h83 #define CLK_TOP_AXI_SEL 73 macro
H A Dmt8135-clk.h73 #define CLK_TOP_AXI_SEL 62 macro
H A Dmt7622-clk.h68 #define CLK_TOP_AXI_SEL 56 macro
H A Dmediatek,mt6795-clk.h90 #define CLK_TOP_AXI_SEL 79 macro
H A Dmt8173-clk.h92 #define CLK_TOP_AXI_SEL 82 macro
H A Dmt6765-clk.h131 #define CLK_TOP_AXI_SEL 96 macro
H A Dmediatek,mt8365-clk.h71 #define CLK_TOP_AXI_SEL 61 macro
H A Dmt2712-clk.h130 #define CLK_TOP_AXI_SEL 99 macro
H A Dmt2701-clk.h90 #define CLK_TOP_AXI_SEL 79 macro
H A Dmt8192-clk.h12 #define CLK_TOP_AXI_SEL 0 macro
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6795.dtsi694 <&topckgen CLK_TOP_AXI_SEL>;
704 <&topckgen CLK_TOP_AXI_SEL>;
714 <&topckgen CLK_TOP_AXI_SEL>;
H A Dmt7622.dtsi260 <&topckgen CLK_TOP_AXI_SEL>;
716 <&topckgen CLK_TOP_AXI_SEL>;
H A Dmt2712e.dtsi780 <&topckgen CLK_TOP_AXI_SEL>,
791 <&topckgen CLK_TOP_AXI_SEL>,
H A Dmt8173.dtsi907 <&topckgen CLK_TOP_AXI_SEL>;
917 <&topckgen CLK_TOP_AXI_SEL>;