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/linux/include/dt-bindings/clock/
H A Dstm32fx-clock.h52 #define CLK_I2C1 26 macro
H A Dexynos5410.h41 #define CLK_I2C1 262 macro
H A Dmicrochip,mpfs-clock.h27 #define CLK_I2C1 16 macro
H A Dactions,s500-cmu.h40 #define CLK_I2C1 20 macro
H A Dthead,th1520-clk-ap.h75 #define CLK_I2C1 65 macro
H A Dactions,s700-cmu.h75 #define CLK_I2C1 51 macro
H A Dactions,s900-cmu.h57 #define CLK_I2C1 39 macro
H A Dexynos5250.h99 #define CLK_I2C1 295 macro
H A Ds5pv210.h167 #define CLK_I2C1 149 macro
H A Dexynos5420.h71 #define CLK_I2C1 262 macro
H A Dexynos4.h156 #define CLK_I2C1 318 macro
H A Dexynos3250.h219 #define CLK_I2C1 213 macro
H A Dsprd,sc9860-clk.h91 #define CLK_I2C1 8 macro
H A Drockchip,rv1126-cru.h99 #define CLK_I2C1 33 macro
/linux/drivers/clk/actions/
H A Dowl-s700.c205 static OWL_GATE(clk_i2c1, "i2c1", "hosc", CMU_DEVCLKEN1, 1, 0, 0);
460 &clk_i2c1.common,
543 [CLK_I2C1] = &clk_i2c1.common.hw,
/linux/drivers/clk/hisilicon/
H A Dclk-hix5hd2.c105 {HIX5HD2_I2C1_CLK, "clk_i2c1", "100m",
107 {HIX5HD2_I2C1_RST, "rst_i2c1", "clk_i2c1",
H A Dcrg-hi3798cv200.c107 { HISTB_I2C1_CLK, "clk_i2c1", "clk_apb",
/linux/Documentation/devicetree/bindings/clock/
H A Dst,stm32-rcc.txt102 26 CLK_I2C1 (I2S clocks)
/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml169 clocks = <&rcc 1 CLK_I2C1>;
/linux/arch/arm64/boot/dts/actions/
H A Ds700.dtsi193 clocks = <&cmu CLK_I2C1>;
H A Ds900.dtsi205 clocks = <&cmu CLK_I2C1>;
/linux/arch/arm/boot/dts/actions/
H A Dowl-s500.dtsi209 clocks = <&cmu CLK_I2C1>;
/linux/drivers/clk/samsung/
H A Dclk-s5pv210.c655 GATE(CLK_I2C1, "i2c1", "dout_pclkd", CLK_GATE_IP3, 10, 0, 0),
698 GATE(CLK_I2C1, "i2c1", "dout_pclkp", CLK_GATE_IP3, 8, 0, 0),
H A Dclk-exynos5410.c205 GATE(CLK_I2C1, "i2c1", "aclk66", GATE_IP_PERIC, 7, 0, 0),
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410.dtsi270 clocks = <&clock CLK_I2C1>;

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