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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq.dtsi110 clocks = <&clk IMX8MQ_CLK_ARM>;
130 clocks = <&clk IMX8MQ_CLK_ARM>;
148 clocks = <&clk IMX8MQ_CLK_ARM>;
166 clocks = <&clk IMX8MQ_CLK_ARM>;
390 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
406 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
422 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
438 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
453 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
490 clocks = <&clk IMX8MQ_CLK_MAIN_AX
656 clk: clock-controller@30380000 { global() label
[all...]
H A Dimx8mn.dtsi66 clocks = <&clk IMX8MN_CLK_ARM>;
87 clocks = <&clk IMX8MN_CLK_ARM>;
106 clocks = <&clk IMX8MN_CLK_ARM>;
125 clocks = <&clk IMX8MN_CLK_ARM>;
301 clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
302 <&clk IMX8MN_CLK_DUMMY>,
303 <&clk IMX8MN_CLK_SAI2_ROOT>,
304 <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
316 clocks = <&clk IMX8MN_CLK_SAI3_IP
636 clk: clock-controller@30380000 { global() label
[all...]
H A Dimx8mm.dtsi66 clocks = <&clk IMX8MM_CLK_ARM>;
87 clocks = <&clk IMX8MM_CLK_ARM>;
106 clocks = <&clk IMX8MM_CLK_ARM>;
125 clocks = <&clk IMX8MM_CLK_ARM>;
276 clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
277 assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
278 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
286 clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
287 assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
288 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100
635 clk: clock-controller@30380000 { global() label
[all...]
H A Dimx8mp.dtsi55 clocks = <&clk IMX8MP_CLK_ARM>;
75 clocks = <&clk IMX8MP_CLK_ARM>;
93 clocks = <&clk IMX8MP_CLK_ARM>;
111 clocks = <&clk IMX8MP_CLK_ARM>;
366 clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
382 clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
398 clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
414 clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
429 clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
474 clocks = <&clk IMX8MP_CLK_MAIN_AX
729 clk: clock-controller@30380000 { global() label
[all...]
H A Dimx93.dtsi170 clocks = <&clk IMX93_CLK_CM33_GATE>;
236 clocks = <&clk IMX93_CLK_EDMA1_GATE>;
249 clocks = <&clk IMX93_CLK_MU1_B_GATE>;
267 clocks = <&clk IMX93_CLK_WDOG1_GATE>;
276 clocks = <&clk IMX93_CLK_WDOG2_GATE>;
284 clocks = <&clk IMX93_CLK_TPM1_GATE>;
292 clocks = <&clk IMX93_CLK_TPM2_GATE>;
303 clocks = <&clk IMX93_CLK_BUS_AON>,
304 <&clk IMX93_CLK_I3C1_GATE>,
305 <&clk IMX93_CLK_I3C1_SLO
308 clk: clock-controller@44450000 { global() label
[all...]
/freebsd/sys/dev/clk/rockchip/
H A Drk_clk_pll.c32 #include <dev/clk/clk.h>
34 #include <dev/clk/rockchip/rk_clk_pll.h>
66 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
72 rk_clk_pll_set_gate(struct clknode *clk, bool enable) in rk_clk_pll_set_gate() argument
77 sc = clknode_get_softc(clk); in rk_clk_pll_set_gate()
88 DEVICE_LOCK(clk); in rk_clk_pll_set_gate()
89 WRITE4(clk, sc->gate_offset, val); in rk_clk_pll_set_gate()
90 DEVICE_UNLOCK(clk); in rk_clk_pll_set_gate()
120 rk3066_clk_pll_init(struct clknode *clk, device_t dev) in rk3066_clk_pll_init() argument
125 sc = clknode_get_softc(clk); in rk3066_clk_pll_init()
[all …]
H A Drk_clk_composite.c32 #include <dev/clk/clk.h>
35 #include <dev/clk/rockchip/rk_clk_composite.h>
68 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
74 rk_clk_composite_read_4(struct clknode *clk, bus_addr_t addr, uint32_t *val) in rk_clk_composite_read_4() argument
78 sc = clknode_get_softc(clk); in rk_clk_composite_read_4()
82 CLKDEV_READ_4(clknode_get_device(clk), addr, val); in rk_clk_composite_read_4()
86 rk_clk_composite_write_4(struct clknode *clk, bus_addr_t addr, uint32_t val) in rk_clk_composite_write_4() argument
90 sc = clknode_get_softc(clk); in rk_clk_composite_write_4()
94 CLKDEV_WRITE_4(clknode_get_device(clk), addr, val); in rk_clk_composite_write_4()
98 rk_clk_composite_get_grf(struct clknode *clk) in rk_clk_composite_get_grf() argument
[all …]
H A Drk_clk_mux.c37 #include <dev/clk/clk.h>
40 #include <dev/clk/rockchip/rk_cru.h>
41 #include <dev/clk/rockchip/rk_clk_mux.h>
59 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
64 static int rk_clk_mux_init(struct clknode *clk, device_t dev);
65 static int rk_clk_mux_set_mux(struct clknode *clk, int idx);
66 static int rk_clk_mux_set_freq(struct clknode *clk, uint64_t fparent,
88 rk_clk_mux_get_grf(struct clknode *clk) in rk_clk_mux_get_grf() argument
95 dev = clknode_get_device(clk); in rk_clk_mux_get_grf()
107 rk_clk_mux_init(struct clknode *clk, device_t dev) in rk_clk_mux_init() argument
[all …]
H A Drk_clk_armclk.c32 #include <dev/clk/clk.h>
34 #include <dev/clk/rockchip/rk_clk_armclk.h>
73 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
79 rk_clk_armclk_init(struct clknode *clk, device_t dev) in rk_clk_armclk_init() argument
84 sc = clknode_get_softc(clk); in rk_clk_armclk_init()
87 DEVICE_LOCK(clk); in rk_clk_armclk_init()
88 READ4(clk, sc->muxdiv_offset, &val); in rk_clk_armclk_init()
89 DEVICE_UNLOCK(clk); in rk_clk_armclk_init()
93 clknode_init_parent_idx(clk, idx); in rk_clk_armclk_init()
99 rk_clk_armclk_set_mux(struct clknode *clk, int index) in rk_clk_armclk_set_mux() argument
[all …]
H A Drk_clk_fract.c32 #include <dev/clk/clk.h>
34 #include <dev/clk/rockchip/rk_clk_fract.h>
51 static int rk_clk_fract_init(struct clknode *clk, device_t dev);
52 static int rk_clk_fract_recalc(struct clknode *clk, uint64_t *req);
55 static int rk_clk_fract_set_gate(struct clknode *clk, bool enable);
138 rk_clk_fract_init(struct clknode *clk, device_t dev) in rk_clk_fract_init() argument
143 sc = clknode_get_softc(clk); in rk_clk_fract_init()
144 DEVICE_LOCK(clk); in rk_clk_fract_init()
145 RD4(clk, sc->offset, &reg); in rk_clk_fract_init()
146 DEVICE_UNLOCK(clk); in rk_clk_fract_init()
[all …]
H A Drk_clk_gate.c33 #include <dev/clk/clk.h>
35 #include <dev/clk/rockchip/rk_clk_gate.h>
50 static int rk_clk_gate_init(struct clknode *clk, device_t dev);
51 static int rk_clk_gate_set_gate(struct clknode *clk, bool enable);
72 rk_clk_gate_init(struct clknode *clk, device_t dev) in rk_clk_gate_init() argument
78 sc = clknode_get_softc(clk); in rk_clk_gate_init()
79 DEVICE_LOCK(clk); in rk_clk_gate_init()
80 rv = RD4(clk, sc->offset, &reg); in rk_clk_gate_init()
81 DEVICE_UNLOCK(clk); in rk_clk_gate_init()
86 clknode_init_parent_idx(clk, 0); in rk_clk_gate_init()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dallwinner,sun4i-a10-gates-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
24 - const: allwinner,sun4i-a10-gates-clk
25 - const: allwinner,sun4i-a10-axi-gates-clk
26 - const: allwinner,sun4i-a10-ahb-gates-clk
27 - const: allwinner,sun5i-a10s-ahb-gates-clk
28 - const: allwinner,sun5i-a13-ahb-gates-clk
29 - const: allwinner,sun7i-a20-ahb-gates-clk
30 - const: allwinner,sun6i-a31-ahb1-gates-clk
31 - const: allwinner,sun8i-a23-ahb1-gates-clk
32 - const: allwinner,sun9i-a80-ahb0-gates-clk
[all …]
H A Dqcom,rpmhcc.yaml20 - qcom,qdu1000-rpmh-clk
21 - qcom,sa8775p-rpmh-clk
22 - qcom,sc7180-rpmh-clk
23 - qcom,sc7280-rpmh-clk
24 - qcom,sc8180x-rpmh-clk
25 - qcom,sc8280xp-rpmh-clk
26 - qcom,sdm670-rpmh-clk
27 - qcom,sdm845-rpmh-clk
28 - qcom,sdx55-rpmh-clk
29 - qcom,sdx65-rpmh-clk
[all...]
H A Dallwinner,sun4i-a10-usb-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-usb-clk.yaml#
27 - allwinner,sun4i-a10-usb-clk
28 - allwinner,sun5i-a13-usb-clk
29 - allwinner,sun6i-a31-usb-clk
30 - allwinner,sun8i-a23-usb-clk
31 - allwinner,sun8i-h3-usb-clk
58 const: allwinner,sun4i-a10-usb-clk
69 const: allwinner,sun5i-a13-usb-clk
80 const: allwinner,sun6i-a31-usb-clk
91 const: allwinner,sun8i-a23-usb-clk
[all …]
/freebsd/sys/dev/clk/xilinx/
H A Dzynqmp_clock.c44 #include <dev/clk/clk.h>
45 #include <dev/clk/clk_fixed.h>
47 #include <dev/clk/xilinx/zynqmp_clk_mux.h>
48 #include <dev/clk/xilinx/zynqmp_clk_pll.h>
49 #include <dev/clk/xilinx/zynqmp_clk_fixed.h>
50 #include <dev/clk/xilinx/zynqmp_clk_div.h>
51 #include <dev/clk/xilinx/zynqmp_clk_gate.h>
113 struct zynqmp_clk *clk; member
119 zynqmp_clk_init(struct clknode *clk, device_t dev) in zynqmp_clk_init() argument
122 clknode_init_parent_idx(clk, 0); in zynqmp_clk_init()
[all …]
/freebsd/sys/dev/clk/allwinner/
H A Daw_clk_m.c30 #include <dev/clk/clk.h>
32 #include <dev/clk/allwinner/aw_clk.h>
33 #include <dev/clk/allwinner/aw_clk_m.h>
40 * clk = clkin / m
69 aw_clk_m_init(struct clknode *clk, device_t dev) in aw_clk_m_init() argument
74 sc = clknode_get_softc(clk); in aw_clk_m_init()
78 DEVICE_LOCK(clk); in aw_clk_m_init()
79 READ4(clk, sc->offset, &val); in aw_clk_m_init()
80 DEVICE_UNLOCK(clk); in aw_clk_m_init()
85 clknode_init_parent_idx(clk, idx); in aw_clk_m_init()
[all …]
H A Daw_clk_nm.c30 #include <dev/clk/clk.h>
32 #include <dev/clk/allwinner/aw_clk.h>
33 #include <dev/clk/allwinner/aw_clk_nm.h>
40 * clk = clkin / n / m
70 aw_clk_nm_init(struct clknode *clk, device_t dev) in aw_clk_nm_init() argument
75 sc = clknode_get_softc(clk); in aw_clk_nm_init()
79 DEVICE_LOCK(clk); in aw_clk_nm_init()
80 READ4(clk, sc->offset, &val); in aw_clk_nm_init()
81 DEVICE_UNLOCK(clk); in aw_clk_nm_init()
86 clknode_init_parent_idx(clk, idx); in aw_clk_nm_init()
[all …]
H A Daw_clk_nkmp.c30 #include <dev/clk/clk.h>
32 #include <dev/clk/allwinner/aw_clk.h>
33 #include <dev/clk/allwinner/aw_clk_nkmp.h>
40 * clk = (clkin * n * k) / (m * p)
74 aw_clk_nkmp_init(struct clknode *clk, device_t dev) in aw_clk_nkmp_init() argument
79 sc = clknode_get_softc(clk); in aw_clk_nkmp_init()
83 DEVICE_LOCK(clk); in aw_clk_nkmp_init()
84 READ4(clk, sc->offset, &val); in aw_clk_nkmp_init()
85 DEVICE_UNLOCK(clk); in aw_clk_nkmp_init()
90 clknode_init_parent_idx(clk, idx); in aw_clk_nkmp_init()
[all …]
H A Daw_clk_frac.c30 #include <dev/clk/clk.h>
32 #include <dev/clk/allwinner/aw_clk.h>
33 #include <dev/clk/allwinner/aw_clk_frac.h>
37 /* #define dprintf(format, arg...) printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg) */
43 * clk = (24Mhz * n) / m in integer mode
44 * clk = frac_out1 or frac_out2 in fractional mode
77 aw_clk_frac_init(struct clknode *clk, device_t dev) in aw_clk_frac_init() argument
82 sc = clknode_get_softc(clk); in aw_clk_frac_init()
86 DEVICE_LOCK(clk); in aw_clk_frac_init()
87 READ4(clk, sc->offset, &val); in aw_clk_frac_init()
[all …]
H A Daw_clk_prediv_mux.c30 #include <dev/clk/clk.h>
32 #include <dev/clk/allwinner/aw_clk.h>
33 #include <dev/clk/allwinner/aw_clk_prediv_mux.h>
40 * clk = clkin / prediv / div
70 aw_clk_prediv_mux_init(struct clknode *clk, device_t dev) in aw_clk_prediv_mux_init() argument
75 sc = clknode_get_softc(clk); in aw_clk_prediv_mux_init()
77 DEVICE_LOCK(clk); in aw_clk_prediv_mux_init()
78 READ4(clk, sc->offset, &val); in aw_clk_prediv_mux_init()
79 DEVICE_UNLOCK(clk); in aw_clk_prediv_mux_init()
83 clknode_init_parent_idx(clk, val); in aw_clk_prediv_mux_init()
[all …]
/freebsd/sys/arm64/freescale/imx/clk/
H A Dimx_clk_composite.c32 #include <dev/clk/clk.h>
34 #include <arm64/freescale/imx/clk/imx_clk_composite.h>
69 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
75 imx_clk_composite_init(struct clknode *clk, device_t dev) in imx_clk_composite_init() argument
80 sc = clknode_get_softc(clk); in imx_clk_composite_init()
82 DEVICE_LOCK(clk); in imx_clk_composite_init()
83 READ4(clk, sc->offset, &val); in imx_clk_composite_init()
84 DEVICE_UNLOCK(clk); in imx_clk_composite_init()
87 clknode_init_parent_idx(clk, idx); in imx_clk_composite_init()
93 imx_clk_composite_set_gate(struct clknode *clk, bool enable) in imx_clk_composite_set_gate() argument
[all …]
H A Dimx_clk_sscg_pll.c32 #include <dev/clk/clk.h>
34 #include <arm64/freescale/imx/clk/imx_clk_sscg_pll.h>
71 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
77 imx_clk_sscg_pll_init(struct clknode *clk, device_t dev) in imx_clk_sscg_pll_init() argument
79 if (clknode_get_parents_num(clk) > 1) { in imx_clk_sscg_pll_init()
80 device_printf(clknode_get_device(clk), in imx_clk_sscg_pll_init()
84 clknode_init_parent_idx(clk, 0); in imx_clk_sscg_pll_init()
90 imx_clk_sscg_pll_set_gate(struct clknode *clk, bool enable) in imx_clk_sscg_pll_set_gate() argument
96 sc = clknode_get_softc(clk); in imx_clk_sscg_pll_set_gate()
98 DEVICE_LOCK(clk); in imx_clk_sscg_pll_set_gate()
[all …]
H A Dimx_clk_mux.c37 #include <dev/clk/clk.h>
39 #include <arm64/freescale/imx/clk/imx_clk_mux.h>
54 static int imx_clk_mux_init(struct clknode *clk, device_t dev);
55 static int imx_clk_mux_set_mux(struct clknode *clk, int idx);
74 imx_clk_mux_init(struct clknode *clk, device_t dev) in imx_clk_mux_init() argument
80 sc = clknode_get_softc(clk); in imx_clk_mux_init()
82 DEVICE_LOCK(clk); in imx_clk_mux_init()
83 rv = RD4(clk, sc->offset, &reg); in imx_clk_mux_init()
84 DEVICE_UNLOCK(clk); in imx_clk_mux_init()
89 clknode_init_parent_idx(clk, reg); in imx_clk_mux_init()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/st/
H A Dst,flexgen.txt88 clk_s_c0_flexgen: clk-s-c0-flexgen {
101 clock-output-names = "clk-icn-gpu",
102 "clk-fdma",
103 "clk-nand",
104 "clk-hva",
105 "clk-proc-stfe",
106 "clk-proc-tp",
107 "clk-rx-icn-dmu",
108 "clk-rx-icn-hva",
109 "clk-icn-cpu",
[all …]
/freebsd/sys/dev/clk/
H A Dclk.h58 typedef struct clk *clk_t;
94 struct clknode *clknode_register(struct clkdom *cldom, struct clknode *clk);
97 phandle_t *cells, struct clknode **clk);
102 int clknode_set_parent_by_idx(struct clknode *clk, int idx);
103 int clknode_set_parent_by_name(struct clknode *clk, const char *name);
104 const char *clknode_get_name(struct clknode *clk);
105 const char **clknode_get_parent_names(struct clknode *clk);
106 int clknode_get_parents_num(struct clknode *clk);
107 int clknode_get_parent_idx(struct clknode *clk);
108 struct clknode *clknode_get_parent(struct clknode *clk);
[all …]

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