Lines Matching full:clk
110 clocks = <&clk IMX8MQ_CLK_ARM>;
130 clocks = <&clk IMX8MQ_CLK_ARM>;
148 clocks = <&clk IMX8MQ_CLK_ARM>;
166 clocks = <&clk IMX8MQ_CLK_ARM>;
390 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
406 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
422 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
438 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
453 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
490 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
513 clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
537 clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
538 <&clk IMX8MQ_CLK_SAI1_ROOT>,
539 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
551 clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
552 <&clk IMX8MQ_CLK_SAI6_ROOT>,
553 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
565 clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
566 <&clk IMX8MQ_CLK_SAI5_ROOT>,
567 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
579 clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
580 <&clk IMX8MQ_CLK_SAI4_ROOT>,
581 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
593 clocks = <&clk IMX8MQ_CLK_GPIO1_ROOT>;
606 clocks = <&clk IMX8MQ_CLK_GPIO2_ROOT>;
619 clocks = <&clk IMX8MQ_CLK_GPIO3_ROOT>;
632 clocks = <&clk IMX8MQ_CLK_GPIO4_ROOT>;
645 clocks = <&clk IMX8MQ_CLK_GPIO5_ROOT>;
657 clocks = <&clk IMX8MQ_CLK_TMU_ROOT>;
710 clocks = <&clk IMX8MQ_CLK_WDOG1_ROOT>;
718 clocks = <&clk IMX8MQ_CLK_WDOG2_ROOT>;
726 clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
734 clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
735 <&clk IMX8MQ_CLK_SDMA2_ROOT>;
745 clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>,
746 <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
747 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>;
749 assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
750 <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
751 <&clk IMX8MQ_CLK_LCDIF_PIXEL>,
752 <&clk IMX8MQ_VIDEO_PLL1>;
753 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,
754 <&clk IMX8MQ_VIDEO_PLL1>,
755 <&clk IMX8MQ_VIDEO_PLL1_OUT>;
785 clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
832 clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>;
840 clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>;
848 clk: clock-controller@30380000 {
860 assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>,
861 <&clk IMX8MQ_CLK_A53_CORE>,
862 <&clk IMX8MQ_CLK_NOC>,
863 <&clk IMX8MQ_CLK_AUDIO_AHB>,
864 <&clk IMX8MQ_AUDIO_PLL1_BYPASS>,
865 <&clk IMX8MQ_AUDIO_PLL2_BYPASS>,
866 <&clk IMX8MQ_AUDIO_PLL1>,
867 <&clk IMX8MQ_AUDIO_PLL2>;
875 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>,
876 <&clk IMX8MQ_ARM_PLL_OUT>,
878 <&clk IMX8MQ_SYS2_PLL_500M>,
879 <&clk IMX8MQ_AUDIO_PLL1>,
880 <&clk IMX8MQ_AUDIO_PLL2>;
946 clocks = <&clk IMX8MQ_CLK_GPU_ROOT>,
947 <&clk IMX8MQ_CLK_GPU_SHADER_DIV>,
948 <&clk IMX8MQ_CLK_GPU_AXI>,
949 <&clk IMX8MQ_CLK_GPU_AHB>;
955 clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>,
956 <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
957 <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
958 assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
959 <&clk IMX8MQ_CLK_VPU_G2>,
960 <&clk IMX8MQ_CLK_VPU_BUS>,
961 <&clk IMX8MQ_VPU_PLL_BYPASS>;
962 assigned-clock-parents = <&clk IMX8MQ_VPU_PLL_OUT>,
963 <&clk IMX8MQ_VPU_PLL_OUT>,
964 <&clk IMX8MQ_SYS1_PLL_800M>,
965 <&clk IMX8MQ_VPU_PLL>;
1006 clocks = <&clk IMX8MQ_CLK_PWM1_ROOT>,
1007 <&clk IMX8MQ_CLK_PWM1_ROOT>;
1017 clocks = <&clk IMX8MQ_CLK_PWM2_ROOT>,
1018 <&clk IMX8MQ_CLK_PWM2_ROOT>;
1028 clocks = <&clk IMX8MQ_CLK_PWM3_ROOT>,
1029 <&clk IMX8MQ_CLK_PWM3_ROOT>;
1039 clocks = <&clk IMX8MQ_CLK_PWM4_ROOT>,
1040 <&clk IMX8MQ_CLK_PWM4_ROOT>;
1067 clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
1068 <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
1069 <&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
1070 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
1071 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
1072 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
1073 <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
1074 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
1075 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
1076 <&clk IMX8MQ_CLK_DUMMY>; /* spba */
1093 clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
1094 <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
1107 clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
1108 <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
1121 clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
1122 <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
1134 clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
1135 <&clk IMX8MQ_CLK_UART1_ROOT>;
1147 clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
1148 <&clk IMX8MQ_CLK_UART3_ROOT>;
1160 clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
1161 <&clk IMX8MQ_CLK_UART2_ROOT>;
1172 clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
1173 <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
1174 <&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
1175 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
1176 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
1177 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
1178 <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
1179 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
1180 <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
1181 <&clk IMX8MQ_CLK_DUMMY>; /* spba */
1197 clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
1198 <&clk IMX8MQ_CLK_SAI2_ROOT>,
1199 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
1211 clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
1212 <&clk IMX8MQ_CLK_SAI3_ROOT>,
1213 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
1227 clocks = <&clk IMX8MQ_CLK_AHB>,
1228 <&clk IMX8MQ_CLK_IPG_ROOT>;
1256 clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
1257 <&clk IMX8MQ_CLK_DSI_AHB>,
1258 <&clk IMX8MQ_CLK_DSI_IPG_DIV>,
1259 <&clk IMX8MQ_CLK_DSI_PHY_REF>,
1260 <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
1262 assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB>,
1263 <&clk IMX8MQ_CLK_DSI_CORE>,
1264 <&clk IMX8MQ_CLK_DSI_IPG_DIV>;
1265 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>,
1266 <&clk IMX8MQ_SYS1_PLL_266M>;
1299 clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
1301 assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
1302 <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
1303 <&clk IMX8MQ_CLK_DSI_PHY_REF>,
1304 <&clk IMX8MQ_VIDEO_PLL1>;
1305 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,
1306 <&clk IMX8MQ_VIDEO_PLL1>,
1307 <&clk IMX8MQ_VIDEO_PLL1_OUT>;
1318 clocks = <&clk IMX8MQ_CLK_I2C1_ROOT>;
1328 clocks = <&clk IMX8MQ_CLK_I2C2_ROOT>;
1338 clocks = <&clk IMX8MQ_CLK_I2C3_ROOT>;
1348 clocks = <&clk IMX8MQ_CLK_I2C4_ROOT>;
1359 clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
1360 <&clk IMX8MQ_CLK_UART4_ROOT>;
1370 clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
1371 <&clk IMX8MQ_CLK_CSI1_ESC>,
1372 <&clk IMX8MQ_CLK_CSI1_PHY_REF>;
1374 assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
1375 <&clk IMX8MQ_CLK_CSI1_PHY_REF>,
1376 <&clk IMX8MQ_CLK_CSI1_ESC>;
1378 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>,
1379 <&clk IMX8MQ_SYS2_PLL_1000M>,
1380 <&clk IMX8MQ_SYS1_PLL_800M>;
1408 clocks = <&clk IMX8MQ_CLK_CSI1_ROOT>;
1422 clocks = <&clk IMX8MQ_CLK_CSI2_CORE>,
1423 <&clk IMX8MQ_CLK_CSI2_ESC>,
1424 <&clk IMX8MQ_CLK_CSI2_PHY_REF>;
1426 assigned-clocks = <&clk IMX8MQ_CLK_CSI2_CORE>,
1427 <&clk IMX8MQ_CLK_CSI2_PHY_REF>,
1428 <&clk IMX8MQ_CLK_CSI2_ESC>;
1430 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>,
1431 <&clk IMX8MQ_SYS2_PLL_1000M>,
1432 <&clk IMX8MQ_SYS1_PLL_800M>;
1460 clocks = <&clk IMX8MQ_CLK_CSI2_ROOT>;
1475 clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
1484 clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
1485 <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
1486 <&clk IMX8MQ_CLK_USDHC1_ROOT>;
1499 clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
1500 <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
1501 <&clk IMX8MQ_CLK_USDHC2_ROOT>;
1517 clocks = <&clk IMX8MQ_CLK_QSPI_ROOT>,
1518 <&clk IMX8MQ_CLK_QSPI_ROOT>;
1527 clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
1528 <&clk IMX8MQ_CLK_AHB>;
1541 clocks = <&clk IMX8MQ_CLK_ENET1_ROOT>,
1542 <&clk IMX8MQ_CLK_ENET1_ROOT>,
1543 <&clk IMX8MQ_CLK_ENET_TIMER>,
1544 <&clk IMX8MQ_CLK_ENET_REF>,
1545 <&clk IMX8MQ_CLK_ENET_PHY_REF>;
1548 assigned-clocks = <&clk IMX8MQ_CLK_ENET_AXI>,
1549 <&clk IMX8MQ_CLK_ENET_TIMER>,
1550 <&clk IMX8MQ_CLK_ENET_REF>,
1551 <&clk IMX8MQ_CLK_ENET_PHY_REF>;
1552 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>,
1553 <&clk IMX8MQ_SYS2_PLL_100M>,
1554 <&clk IMX8MQ_SYS2_PLL_125M>,
1555 <&clk IMX8MQ_SYS2_PLL_50M>;
1569 clocks = <&clk IMX8MQ_CLK_NOC>;
1602 clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
1615 clocks = <&clk IMX8MQ_CLK_GPU_ROOT>,
1616 <&clk IMX8MQ_CLK_GPU_SHADER_DIV>,
1617 <&clk IMX8MQ_CLK_GPU_AXI>,
1618 <&clk IMX8MQ_CLK_GPU_AHB>;
1621 assigned-clocks = <&clk IMX8MQ_CLK_GPU_CORE_SRC>,
1622 <&clk IMX8MQ_CLK_GPU_SHADER_SRC>,
1623 <&clk IMX8MQ_CLK_GPU_AXI>,
1624 <&clk IMX8MQ_CLK_GPU_AHB>,
1625 <&clk IMX8MQ_GPU_PLL_BYPASS>;
1626 assigned-clock-parents = <&clk IMX8MQ_GPU_PLL_OUT>,
1627 <&clk IMX8MQ_GPU_PLL_OUT>,
1628 <&clk IMX8MQ_GPU_PLL_OUT>,
1629 <&clk IMX8MQ_GPU_PLL_OUT>,
1630 <&clk IMX8MQ_GPU_PLL>;
1639 clocks = <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>,
1640 <&clk IMX8MQ_CLK_USB_CORE_REF>,
1641 <&clk IMX8MQ_CLK_32K>;
1643 assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
1644 <&clk IMX8MQ_CLK_USB_CORE_REF>;
1645 assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
1646 <&clk IMX8MQ_SYS1_PLL_100M>;
1659 clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
1661 assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
1662 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
1671 clocks = <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>,
1672 <&clk IMX8MQ_CLK_USB_CORE_REF>,
1673 <&clk IMX8MQ_CLK_32K>;
1675 assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
1676 <&clk IMX8MQ_CLK_USB_CORE_REF>;
1677 assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
1678 <&clk IMX8MQ_SYS1_PLL_100M>;
1691 clocks = <&clk IMX8MQ_CLK_USB2_PHY_ROOT>;
1693 assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
1694 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
1704 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
1712 clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
1721 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
1722 <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
1749 clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
1750 <&clk IMX8MQ_CLK_PCIE1_PHY>,
1751 <&clk IMX8MQ_CLK_PCIE1_PHY>,
1752 <&clk IMX8MQ_CLK_PCIE1_AUX>;
1759 assigned-clocks = <&clk IMX8MQ_CLK_PCIE1_CTRL>,
1760 <&clk IMX8MQ_CLK_PCIE1_PHY>,
1761 <&clk IMX8MQ_CLK_PCIE1_AUX>;
1762 assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
1763 <&clk IMX8MQ_SYS2_PLL_100M>,
1764 <&clk IMX8MQ_SYS1_PLL_80M>;
1792 clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
1793 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1794 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1795 <&clk IMX8MQ_CLK_PCIE2_AUX>;
1802 assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>,
1803 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1804 <&clk IMX8MQ_CLK_PCIE2_AUX>;
1805 assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
1806 <&clk IMX8MQ_SYS2_PLL_100M>,
1807 <&clk IMX8MQ_SYS1_PLL_80M>;
1822 clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
1823 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1824 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1825 <&clk IMX8MQ_CLK_PCIE2_AUX>;
1832 assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>,
1833 <&clk IMX8MQ_CLK_PCIE2_PHY>,
1834 <&clk IMX8MQ_CLK_PCIE2_AUX>;
1835 assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
1836 <&clk IMX8MQ_SYS2_PLL_100M>,
1837 <&clk IMX8MQ_SYS1_PLL_80M>;
1862 clocks = <&clk IMX8MQ_CLK_DRAM_CORE>,
1863 <&clk IMX8MQ_DRAM_PLL_OUT>,
1864 <&clk IMX8MQ_CLK_DRAM_ALT>,
1865 <&clk IMX8MQ_CLK_DRAM_APB>;