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/linux/drivers/spi/
H A Dspi-omap-uwire.c90 struct clk *ck; member
342 rate = clk_get_rate(uwire->ck); in uwire_setup_transfer()
414 clk_get_rate(uwire->ck) / 1000, in uwire_setup_transfer()
450 clk_disable_unprepare(uwire->ck); in uwire_off()
475 uwire->ck = devm_clk_get(&pdev->dev, "fck"); in uwire_probe()
476 if (IS_ERR(uwire->ck)) { in uwire_probe()
477 status = PTR_ERR(uwire->ck); in uwire_probe()
482 clk_prepare_enable(uwire->ck); in uwire_probe()
527 // suspend ... unuse ck
528 // resume ... use ck
/linux/net/wireless/
H A Dibss.c218 struct cfg80211_cached_keys *ck = NULL; in cfg80211_ibss_wext_join() local
273 ck = kmemdup(wdev->wext.keys, sizeof(*ck), GFP_KERNEL); in cfg80211_ibss_wext_join()
274 if (!ck) in cfg80211_ibss_wext_join()
277 ck->params[i].key = ck->data[i]; in cfg80211_ibss_wext_join()
280 &wdev->wext.ibss, ck); in cfg80211_ibss_wext_join()
282 kfree(ck); in cfg80211_ibss_wext_join()
/linux/kernel/sched/
H A Dcore_sched.c15 struct sched_core_cookie *ck = kmalloc_obj(*ck); in sched_core_alloc_cookie() local
16 if (!ck) in sched_core_alloc_cookie()
19 refcount_set(&ck->refcnt, 1); in sched_core_alloc_cookie()
22 return (unsigned long)ck; in sched_core_alloc_cookie()
/linux/crypto/
H A Dsm4.c18 static const u32 ____cacheline_aligned ck[32] = { variable
65 extern const u32 crypto_sm4_ck[32] __alias(ck);
135 rk[0] ^= sm4_key_sub(rk[1] ^ rk[2] ^ rk[3] ^ ck[i + 0]); in sm4_expandkey()
136 rk[1] ^= sm4_key_sub(rk[2] ^ rk[3] ^ rk[0] ^ ck[i + 1]); in sm4_expandkey()
137 rk[2] ^= sm4_key_sub(rk[3] ^ rk[0] ^ rk[1] ^ ck[i + 2]); in sm4_expandkey()
138 rk[3] ^= sm4_key_sub(rk[0] ^ rk[1] ^ rk[2] ^ ck[i + 3]); in sm4_expandkey()
/linux/net/rds/
H A Dmessage.c62 struct rds_zcopy_cookies *ck = &info->zcookies; in rds_zcookie_add() local
63 int ncookies = ck->num; in rds_zcookie_add()
67 ck->cookies[ncookies] = cookie; in rds_zcookie_add()
68 ck->num = ++ncookies; in rds_zcookie_add()
100 struct rds_zcopy_cookies *ck; in rds_rm_zerocopy_callback() local
120 ck = &info->zcookies; in rds_rm_zerocopy_callback()
121 memset(ck, 0, sizeof(*ck)); in rds_rm_zerocopy_callback()
/linux/fs/lockd/
H A Dsvc4proc.c502 #define Ck (1+XDR_QUADLEN(NLM_MAXCOOKIELEN)) /* cookie */ macro
525 .pc_xdrressize = Ck+St+2+No+Rg,
535 .pc_xdrressize = Ck+St,
545 .pc_xdrressize = Ck+St,
555 .pc_xdrressize = Ck+St,
565 .pc_xdrressize = Ck+St,
715 .pc_xdrressize = Ck+St+1,
725 .pc_xdrressize = Ck+St+1,
735 .pc_xdrressize = Ck+St,
H A Dsvcproc.c534 #define Ck (1+XDR_QUADLEN(NLM_MAXCOOKIELEN)) /* cookie */ macro
557 .pc_xdrressize = Ck+St+2+No+Rg,
567 .pc_xdrressize = Ck+St,
577 .pc_xdrressize = Ck+St,
587 .pc_xdrressize = Ck+St,
597 .pc_xdrressize = Ck+St,
747 .pc_xdrressize = Ck+St+1,
757 .pc_xdrressize = Ck+St+1,
767 .pc_xdrressize = Ck+St,
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_plane.h4 * Author: CK Hu <ck.hu@mediatek.com>
H A Dmtk_plane.c4 * Author: CK Hu <ck.hu@mediatek.com>
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,cec.yaml10 - CK Hu <ck.hu@mediatek.com>
H A Dmediatek,hdmi-ddc.yaml10 - CK Hu <ck.hu@mediatek.com>
H A Dmediatek,hdmi.yaml10 - CK Hu <ck.hu@mediatek.com>
/linux/tools/testing/selftests/net/
H A Dmsg_zerocopy.c350 static uint32_t do_process_zerocopy_cookies(struct rds_zcopy_cookies *ck) in do_process_zerocopy_cookies() argument
354 if (ck->num > RDS_MAX_ZCOOKIES) in do_process_zerocopy_cookies()
356 ck->num, RDS_MAX_ZCOOKIES); in do_process_zerocopy_cookies()
357 for (i = 0; i < ck->num; i++) in do_process_zerocopy_cookies()
359 fprintf(stderr, "%d\n", ck->cookies[i]); in do_process_zerocopy_cookies()
360 return ck->num; in do_process_zerocopy_cookies()
366 struct rds_zcopy_cookies *ck; in do_recvmsg_completion() local
385 ck = (struct rds_zcopy_cookies *)CMSG_DATA(cmsg); in do_recvmsg_completion()
386 completions += do_process_zerocopy_cookies(ck); in do_recvmsg_completion()
/linux/include/soc/at91/
H A Dsama7-ddr.h23 #define DDR3PHY_PGCR_CKDV1 (1 << 13) /* CK# Disable Value */
24 #define DDR3PHY_PGCR_CKDV0 (1 << 12) /* CK Disable Value */
34 #define DDR3PHY_ACIOCR_CKPDD_CK0 (1 << 8) /* CK[0] Power Down Driver */
/linux/arch/arm64/boot/dts/qcom/
H A Dqcs404-evb-4000.dts83 tx-ck-pins {
89 rx-ck-pins {
/linux/Documentation/devicetree/bindings/mmc/
H A Darm,pl18x.yaml160 st,ck-gpios:
163 The GPIO matching the CK pin.
172 st,ck-gpios: [ "st,use-ckin" ]
H A Dmtk-sd.yaml141 mediatek,latch-ck:
144 Some SoCs do not support enhance_rx, need set correct latch-ck to avoid
/linux/Documentation/devicetree/bindings/net/
H A Dstm32-dwmac.yaml86 - eth-ck
177 "eth-ck";
/linux/drivers/video/fbdev/omap/
H A Domapfb.h178 int (*set_color_key) (struct omapfb_color_key *ck);
179 int (*get_color_key) (struct omapfb_color_key *ck);
/linux/arch/arm/mach-omap1/
H A Dclock.h25 #define CLK(dev, con, ck, cp) \ argument
31 .clk_hw = ck, \
/linux/arch/arm64/crypto/
H A Dsm4-ce.h8 const u32 *fk, const u32 *ck);
/linux/arch/arm/boot/dts/ti/omap/
H A Dam43xx-clocks.dtsi804 clkout1_osc_div_ck: clock-clkout1-osc-div-ck {
814 clkout1_src2_mux_ck: clock-clkout1-src2-mux-ck {
824 clkout1_src2_pre_div_ck: clock-clkout1-src2-pre-div-ck {
834 clkout1_src2_post_div_ck: clock-clkout1-src2-post-div-ck {
845 clkout1_mux_ck: clock-clkout1-mux-ck {
855 clkout1_ck: clock-clkout1-ck {
/linux/drivers/clk/ti/
H A Dclock.h87 #define CLK(dev, con, ck) \ argument
93 .clk = ck, \
/linux/arch/arm64/boot/dts/st/
H A Dstm32mp253.dtsi57 "eth-ck";
H A Dstm32mp233.dtsi57 "eth-ck";

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