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/linux/crypto/
H A Drmd160.c51 u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee; in rmd160_transform() local
63 ccc = state[2]; in rmd160_transform()
158 ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8); in rmd160_transform()
159 ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9); in rmd160_transform()
160 ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9); in rmd160_transform()
161 ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11); in rmd160_transform()
162 ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13); in rmd160_transform()
163 ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15); in rmd160_transform()
164 ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15); in rmd160_transform()
165 ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5); in rmd160_transform()
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/linux/fs/unicode/
H A Dutf8-norm.c156 * defined. The CCC of a non-defined code point is 0.
159 * with a non-zero CCC that occur between two characters with
160 * a CCC of 0, or at the begin or end of a string.
161 * The unicode standard guarantees that all CCC values are
164 * Code points with CCC 0 are known as stoppers.
168 * The CCC of a decomposable character is the same as the CCC
172 * These do affect normalization, as they all have CCC 0.
433 u8c->ccc = STOPPER; in utf8ncursor()
454 * Characters are emitted if they match the current CCC in u8c->ccc.
455 * Hitting end-of-string while u8c->ccc == STOPPER means we're done,
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H A Dmkutf8data.c151 * defined. The CCC of a non-defined code point is 0.
154 * with a non-zero CCC that occur between two characters with
155 * a CCC of 0, or at the begin or end of a string.
156 * The unicode standard guarantees that all CCC values are
159 * Code points with CCC 0 are known as stoppers.
163 * The CCC of a decomposable character is the same as the CCC
167 * These do affect normalization, as they all have CCC 0.
1341 int ccc; member
1381 if (left->ccc != right->ccc) in nfdi_equal()
1398 if (left->ccc != right->ccc) in nfdicf_equal()
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H A Dutf8n.h42 short int ccc; member
/linux/include/linux/i3c/
H A Dccc.h14 /* I3C CCC (Common Command Codes) related definitions */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
60 * Depending on the CCC command, the specific events coming from all devices
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
121 * struct i3c_ccc_defslvs - payload passed to DEFSLVS CCC
150 * struct i3c_ccc_enttm - payload passed to ENTTM CCC
154 * Information passed to the ENTTM CCC to instruct an I3C device to enter a
174 * struct i3c_ccc_getpid - payload passed to GETPID CCC
183 * struct i3c_ccc_getbcr - payload passed to GETBCR CCC
[all …]
H A Dmaster.h15 #include <linux/i3c/ccc.h>
341 * dynamic address (RSTDAA CCC), we need to make sure no one is trying
398 * should send an ENTDAA CCC command and then add all devices
403 * @supports_ccc_cmd: should return true if the CCC command is supported, false
406 * all CCC commands are supported.
407 * @send_ccc_cmd: send a CCC command
438 * IRQ) and then send the ENEC CCC command (with the IBI flag set)
441 * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
/linux/Documentation/driver-api/i3c/
H A Dprotocol.rst121 I3C CCC commands
124 CCC (Common Command Code) commands are meant to be used for anything that is
127 CCC commands contain an 8-bit CCC ID describing the command that is executed.
132 payload is either sent by the master sending the command (write CCC command),
133 or sent by the slave receiving the command (read CCC command). Of course, read
135 Note that, when sending a CCC command to a specific device, the device address
139 from the CCC ID.
141 Note that vendors can use a dedicated range of CCC IDs for their own commands
172 using a broadcast CCC command.
/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dcore.c191 struct i3c_ccc_cmd *ccc) in i3c_hci_send_ccc_cmd() argument
196 bool prefixed = raw && !!(ccc->id & I3C_CCC_DIRECT); in i3c_hci_send_ccc_cmd()
197 unsigned int nxfers = ccc->ndests + prefixed; in i3c_hci_send_ccc_cmd()
202 ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len); in i3c_hci_send_ccc_cmd()
213 ccc->id, true); in i3c_hci_send_ccc_cmd()
218 xfer[i].data = ccc->dests[i].payload.data; in i3c_hci_send_ccc_cmd()
219 xfer[i].data_len = ccc->dests[i].payload.len; in i3c_hci_send_ccc_cmd()
220 xfer[i].rnw = ccc->rnw; in i3c_hci_send_ccc_cmd()
221 ret = hci->cmd->prep_ccc(hci, &xfer[i], ccc->dests[i].addr, in i3c_hci_send_ccc_cmd()
222 ccc->id, raw); in i3c_hci_send_ccc_cmd()
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H A Dext_caps.c38 DBG("raw CCC quirks set"); in hci_extcap_hardware_id()
153 dev_info(&hci->master.dev, "CCC Response Configuration available\n"); in hci_extcap_ccc_resp_conf()
/linux/drivers/power/supply/
H A Daxp20x_battery.c960 int ccc = info->constant_charge_current_max_ua; in axp209_set_battery_info() local
966 /* Set max to unverified value to be able to set CCC */ in axp209_set_battery_info()
967 axp_batt->max_ccc = ccc; in axp209_set_battery_info()
969 if (ccc <= 0 || axp20x_set_constant_charge_current(axp_batt, ccc)) { in axp209_set_battery_info()
971 "couldn't set ccc from DT: fallback to min value\n"); in axp209_set_battery_info()
972 ccc = 300000; in axp209_set_battery_info()
973 axp_batt->max_ccc = ccc; in axp209_set_battery_info()
974 axp20x_set_constant_charge_current(axp_batt, ccc); in axp209_set_battery_info()
984 int ccc = info->constant_charge_current_max_ua; in axp717_set_battery_info() local
996 axp_batt->max_ccc = ccc; in axp717_set_battery_info()
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/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-ccc.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
20 const: microchip,mpfs-ccc
31 The CCC PLL's have two input clocks. It is required that even if the input
72 compatible = "microchip,mpfs-ccc";
/linux/drivers/clk/microchip/
H A Dclk-mpfs-ccc.c58 * mpfs_ccc_lock prevents anything else from writing to a fabric ccc
204 pll_hw->name = devm_kasprintf(dev, GFP_KERNEL, "ccc%s_pll%u", in mpfs_ccc_register_plls()
216 return dev_err_probe(dev, ret, "failed to register ccc id: %d\n", in mpfs_ccc_register_plls()
267 { .compatible = "microchip,mpfs-ccc", },
275 .name = "microchip-mpfs-ccc",
H A DMakefile5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o
/linux/drivers/i3c/master/
H A Ddw-i3c-master.c715 struct i3c_ccc_cmd *ccc) in dw_i3c_ccc_set() argument
721 if (ccc->id & I3C_CCC_DIRECT) { in dw_i3c_ccc_set()
722 pos = dw_i3c_master_get_addr_pos(master, ccc->dests[0].addr); in dw_i3c_ccc_set()
732 cmd->tx_buf = ccc->dests[0].payload.data; in dw_i3c_ccc_set()
733 cmd->tx_len = ccc->dests[0].payload.len; in dw_i3c_ccc_set()
735 cmd->cmd_hi = COMMAND_PORT_ARG_DATA_LEN(ccc->dests[0].payload.len) | in dw_i3c_ccc_set()
740 COMMAND_PORT_CMD(ccc->id) | in dw_i3c_ccc_set()
750 ccc->err = I3C_ERROR_M2; in dw_i3c_ccc_set()
757 static int dw_i3c_ccc_get(struct dw_i3c_master *master, struct i3c_ccc_cmd *ccc) in dw_i3c_ccc_get() argument
763 pos = dw_i3c_master_get_addr_pos(master, ccc->dests[0].addr); in dw_i3c_ccc_get()
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H A Dsvc-i3c-master.c1309 /* cmd->xfer is NULL if I2C or CCC transfer */ in svc_i3c_master_start_xfer_locked()
1363 /* No software support for CCC commands targeting more than one slave */ in svc_i3c_master_supports_ccc_cmd()
1368 struct i3c_ccc_cmd *ccc) in svc_i3c_master_send_bdcast_ccc_cmd() argument
1370 unsigned int xfer_len = ccc->dests[0].payload.len + 1; in svc_i3c_master_send_bdcast_ccc_cmd()
1386 buf[0] = ccc->id; in svc_i3c_master_send_bdcast_ccc_cmd()
1387 memcpy(&buf[1], ccc->dests[0].payload.data, ccc->dests[0].payload.len); in svc_i3c_master_send_bdcast_ccc_cmd()
1392 cmd->addr = ccc->dests[0].addr; in svc_i3c_master_send_bdcast_ccc_cmd()
1393 cmd->rnw = ccc->rnw; in svc_i3c_master_send_bdcast_ccc_cmd()
1414 struct i3c_ccc_cmd *ccc) in svc_i3c_master_send_direct_ccc_cmd() argument
1416 unsigned int xfer_len = ccc->dests[0].payload.len; in svc_i3c_master_send_direct_ccc_cmd()
[all …]
/linux/arch/mips/include/asm/
H A Dpgtable-bits.h203 * 64-bit, R1 or earlier: CCC D V G [S H] M A W R P
204 * 32-bit, R1 or earlier: CCC D V G M A W R P
205 * 64-bit, R2 or later: CCC D V G RI/R XI [S H] M A W P
206 * 32-bit, R2 or later: CCC D V G RI/R XI M A W P
/linux/drivers/gpu/drm/armada/
H A Darmada_overlay.c354 #define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8) in armada_overlay_set_property() macro
355 drm_to_overlay_state(state)->colorkey_yr = CCC(K2R(val)); in armada_overlay_set_property()
356 drm_to_overlay_state(state)->colorkey_ug = CCC(K2G(val)); in armada_overlay_set_property()
357 drm_to_overlay_state(state)->colorkey_vb = CCC(K2B(val)); in armada_overlay_set_property()
358 #undef CCC in armada_overlay_set_property()
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi263 compatible = "microchip,mpfs-ccc";
271 compatible = "microchip,mpfs-ccc";
279 compatible = "microchip,mpfs-ccc";
287 compatible = "microchip,mpfs-ccc";
/linux/drivers/i3c/
H A Dmaster.c70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
910 * Send a ENTDAA CCC command to start a DAA procedure.
912 * Note that this function only sends the ENTDAA CCC command, all the logic
961 * i3c_master_disec_locked() - send a DISEC CCC command
966 * Send a DISEC CCC command to disable some or all events coming from a
982 * i3c_master_enec_locked() - send an ENEC CCC command
987 * Sends an ENEC CCC command to enable some or all events coming from a
1003 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1006 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1221 * while expecting shorter length from this CCC command. in i3c_master_getmxds_locked()
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/linux/fs/smb/client/
H A Dcifsroot.c28 char addr[sizeof("aaa.bbb.ccc.ddd")]; in parse_srvaddr()
/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-cursor.svg402 sodipodi:nodetypes="ccc" />
408 sodipodi:nodetypes="ccc" />
414 sodipodi:nodetypes="ccc" />
/linux/drivers/ata/
H A Dahci_dwc.c233 /* 1ms tick is generated only for the CCC or DevSleep features */ in ahci_dwc_init_timer()
254 dev_info(&dpriv->pdev->dev, "Update CCC/DevSlp timer for Fapp %lu MHz\n", in ahci_dwc_init_timer()
/linux/tools/perf/bench/
H A Dfind-bit-bench.c46 : "=@ccc" (oldbit) in asm_test_bit()
/linux/samples/kfifo/
H A Drecord-example.c59 "ccc",
/linux/drivers/gpu/drm/amd/pm/inc/
H A Dsmu_v13_0_0_pptable.h30 #define SMU_13_0_0_PP_PLATFORM_CAP_POWERPLAY 0x1 // This cap indicates whether CCC need to s…

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