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/linux/Documentation/arch/arm64/
H A D	elf_hwcaps.rst	19 Userspace software can test for features by acquiring the AT_HWCAP, 32 Where software relies on a feature described by a hwcap, it should check 46 which are described by architected ID registers inaccessible to 53 Functionality implied by idreg.field == val. 58 indicate the absence of functionality implied by other values of 62 described by ID registers alone. These may be described without 70 Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000. 73 Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000. 80 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001. 83 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010. [all …]
/linux/include/dt-bindings/clock/
H A D	tegra186-clock.h	376 /** @brief output branch of PLL_C for ISP, controlled by gate CLK_ENB_PLLC_OUT_ISP / 378 /* @brief output branch of PLL_C for VI, controlled by gate CLK_ENB_PLLC_OUT_VE / 380 /* @brief output branch of PLL_C for AON domain, controlled by gate CLK_ENB_PLLC_OUT_AON / 384 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 / 386 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 / 388 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN / 398 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 / 400 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP / 402 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI / 404 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1 */ [all …]
H A D	tegra234-clock.h	12 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON / 18 /* output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AHUB / 22 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_APE / 24 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AUD_MCLK / 26 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AXI_CBB / 28 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_CAN1 / 32 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_CAN2 / 38 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC1 / 40 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC2 / 42 /* @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC3 */ [all …]
/linux/drivers/android/
H A D	binder_internal.h	`180 * (protected by @proc->inner_lock) 182 * (protected by @proc->inner_lock) 184 * (protected by binder_dead_nodes_lock) 188 * (protected by @lock) 191 * (protected by @proc->inner_lock if @proc 192 * and by @lock) 194 * (protected by @proc->inner_lock if @proc 195 * and by @lock) 197 * (protected by @proc->inner_lock if @proc 198 * and by @lock) [all …]`
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
H A D	tlb.json	4 …struction fetch. If there are multiple misses in the TLB that are resolved by the refill, then thi… 8 …es in the TLB that are resolved by the refill, then this event only counts once. This event counts… 12 …"PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operatio… 20 …Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, excep… 24 …"PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operation… 28 …by a miss in the L2 TLB driven by a memory access. Note that partial translations that also cause … 32 …by a miss in the L2 TLB driven by a memory access. Partial translations that also cause a table wa… 36 …by memory read operations. If there are multiple misses in the TLB that are resolved by the refill… 40 …by data side memory write operations. If there are multiple misses in the TLB that are resolved by… 44 …"PublicDescription": "Counts level 1 data TLB accesses caused by memory read operations. This even… [all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
H A D	tlb.json	4 …struction fetch. If there are multiple misses in the TLB that are resolved by the refill, then thi… 8 …es in the TLB that are resolved by the refill, then this event only counts once. This event counts… 12 …"PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operatio… 20 …Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, excep… 24 …"PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operation… 28 …by a miss in the L2 TLB driven by a memory access. Note that partial translations that also cause … 32 …by a miss in the L2 TLB driven by a memory access. Partial translations that also cause a table wa… 36 …by memory read operations. If there are multiple misses in the TLB that are resolved by the refill… 40 …by data side memory write operations. If there are multiple misses in the TLB that are resolved by… 44 …"PublicDescription": "Counts level 1 data TLB accesses caused by memory read operations. This even… [all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A D	tlb.json	4 …struction fetch. If there are multiple misses in the TLB that are resolved by the refill, then thi… 8 …es in the TLB that are resolved by the refill, then this event only counts once. This event counts… 12 …"PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operatio… 20 …Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, excep… 24 …"PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operation… 28 …by a miss in the L2 TLB driven by a memory access. Note that partial translations that also cause … 32 …by a miss in the L2 TLB driven by a memory access. Partial translations that also cause a table wa… 36 …by memory read operations. If there are multiple misses in the TLB that are resolved by the refill… 40 …by data side memory write operations. If there are multiple misses in the TLB that are resolved by… 44 …"PublicDescription": "Counts level 1 data TLB accesses caused by memory read operations. This even… [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A D	crypto6.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A D	crypto6.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A D	crypto.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A D	crypto.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z10/
H A D	crypto.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A D	crypto.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z196/
H A D	crypto.json	7 …counter counts the total number of the pseudorandom-number-generation functions issued by the CPU." 14 …HA coprocessor is busy performing the pseudorandom- number-generation functions issued by the CPU." 21 …unctions that are issued by the CPU and are blocked because the DEA/AES/SHA coprocessor is busy pe… 28 …mber-generation functions issued by the CPU because the DEA/AES/SHA coprocessor is busy performing… 35 …"PublicDescription": "This counter counts the total number of the SHA functions issued by the CPU." 42 …ber of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU." 49 …HA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy perfor… 56 …blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a f… 63 …"PublicDescription": "This counter counts the total number of the DEA functions issued by the CPU." 70 …of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU." [all …]
/linux/drivers/usb/storage/
H A D	unusual_devs.h	6 * Current development and maintenance by: 9 * Initial work by: 21 * If you edit this file, please try to keep it sorted first by VendorID, 22 * then by ProductID. 55 /* patch submitted by Vivian Bregier <Vivian.Bregier@imag.fr> / 62 / Reported by Rodolfo Quesada <rquesada@roqz.net> / 74 / Reported by Ben Efros <ben@pc-doctor.com> / 82 Reported by Grant Grundler <grundler@parisc-linux.org> 97 * Reported by Sebastian Kapfer <sebastian_kapfer@gmx.net> 107 /* Patch submitted by Mihnea-Costin Grigore <mihnea@zulu.ro> */ [all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a73/
H A D	mmu.json	3 "PublicDescription": "Duration of a translation table walk handled by the MMU", 6 "BriefDescription": "Duration of a translation table walk handled by the MMU" 9 "PublicDescription": "Duration of a Stage 1 translation table walk handled by the MMU", 12 "BriefDescription": "Duration of a Stage 1 translation table walk handled by the MMU" 15 "PublicDescription": "Duration of a Stage 2 translation table walk handled by the MMU", 18 "BriefDescription": "Duration of a Stage 2 translation table walk handled by the MMU" 21 "PublicDescription": "Duration of a translation table walk requested by the LSU", 24 "BriefDescription": "Duration of a translation table walk requested by the LSU" 27 … "PublicDescription": "Duration of a translation table walk requested by the Instruction Side", 30 "BriefDescription": "Duration of a translation table walk requested by the Instruction Side" [all …]
/linux/Documentation/admin-guide/pm/
H A D	intel_pstate.rst	24 For the processors supported by ``intel_pstate``, the P-state concept is broader 26 LinuxCon Europe 2015 presentation by Kristen Accardi [1]_ for more 28 by ``intel_pstate`` internally follows the hardware specification (for details 31 frequencies are involved in the user space interface exposed by it, so 36 that. Some functionality of the core is limited by that. 38 Since the hardware P-state selection interface used by ``intel_pstate`` is 59 allows the hardware to do performance scaling by itself, while in the passive 60 mode it responds to requests made by a generic ``CPUFreq`` governor implementing 83 For example, the ``powersave`` P-state selection algorithm provided by 87 There are two P-state selection algorithms provided by ``intel_pstate`` in the [all …]
/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A D	core-imp-def.json	249 "PublicDescription": "Number of SWOB drains triggered by timeout", 252 "BriefDescription": "Number of SWOB drains triggered by timeout" 255 …"PublicDescription": "Number of SWOB drains triggered by system register or special-purpose regist… 258 …"BriefDescription": "Number of SWOB drains triggered by system register or special-purpose registe… 261 … "PublicDescription": "Number of SWOB drains triggered by system register write when SWOB full", 264 … "BriefDescription": "Number of SWOB drains triggered by system register write when SWOB full" 285 "PublicDescription": "Instructions issued by the scheduler", 288 "BriefDescription": "Instructions issued by the scheduler" 309 "PublicDescription": "Uops issued by the scheduler on IXA", 312 "BriefDescription": "Uops issued by the scheduler on IXA" [all …]
/linux/arch/powerpc/xmon/
H A D	ppc.h	3 Written by Ian Lance Taylor, Cygnus Support 9 License as published by the Free Software Foundation; either version 41 /* The opcode mask. This is used by the disassembler. This is a 44 match (and are presumably filled in by operands). / 59 appear in assembly code, and are terminated by a zero. / 63 /* The table itself is sorted by major opcode number, and is otherwise 82 /* Opcode is supported by the Motorola PowerPC 601 processor. The 601 104 /* Opcode is supported by Altivec Vector Unit / 107 / Opcode is supported by PowerPC 403 processor. / 110 / Opcode is supported by PowerPC BookE processor. */ [all …]
/linux/drivers/infiniband/sw/rxe/
H A D	rxe_queue.h	`24 * by user so a local copy is used and a shared copy is 26 * - By passing the type in the parameter list separate from q 37 * @QUEUE_TYPE_TO_CLIENT: Queue is written by rxe driver and 38 * read by client which may be a user space 40 * Used by rxe internals only. 41 * @QUEUE_TYPE_FROM_CLIENT: Queue is written by client and 42 * read by rxe driver. 43 * Used by rxe internals only. 44 * @QUEUE_TYPE_FROM_ULP: Queue is written by kernel ulp and 45 * read by rxe driver. [all …]`
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	uncore-io.json	13 …by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a … 29 …by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a … 197 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 205 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 210 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 218 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 223 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 231 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 236 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 244 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	uncore-io.json	13 …by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a … 29 …by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a … 197 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 205 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 210 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 218 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 223 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 231 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… 236 "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", 244 …"PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the at… [all …]
/linux/tools/perf/pmu-events/arch/x86/westmereex/
H A D	memory.json	11 "BriefDescription": "Offcore data reads satisfied by any DRAM", 31 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 41 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 51 "BriefDescription": "Offcore code reads satisfied by any DRAM", 71 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 81 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 91 "BriefDescription": "Offcore requests satisfied by any DRAM", 111 "BriefDescription": "Offcore requests satisfied by the local DRAM", 121 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 131 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemex/
H A D	memory.json	3 "BriefDescription": "Offcore data reads satisfied by any DRAM", 23 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 33 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 43 "BriefDescription": "Offcore code reads satisfied by any DRAM", 63 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 73 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 83 "BriefDescription": "Offcore requests satisfied by any DRAM", 103 "BriefDescription": "Offcore requests satisfied by the local DRAM", 113 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 123 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemep/
H A D	memory.json	3 "BriefDescription": "Offcore data reads satisfied by any DRAM", 23 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 33 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 43 "BriefDescription": "Offcore code reads satisfied by any DRAM", 63 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 73 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 83 "BriefDescription": "Offcore requests satisfied by any DRAM", 103 "BriefDescription": "Offcore requests satisfied by the local DRAM", 113 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 123 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]

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