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Searched full:beats (Results 1 – 19 of 19) sorted by relevance

/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Ddata-fabric.json4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.",
20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.",
28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.",
36 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 4.",
44 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 5.",
52 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 6.",
60 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 7.",
68 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 8.",
76 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 9.",
[all …]
/linux/Documentation/devicetree/bindings/ata/
H A Dbaikal,bt1-ahci.yaml61 transaction size can't exceed 16 beats (AxLEN[3:0]).
68 transaction size can't exceed 16 beats (AxLEN[3:0]).
/linux/tools/perf/pmu-events/arch/arm64/arm/cmn/sys/
H A Dcmn.json118 …"BriefDescription": "Number of RData beats (RVALID and RREADY) dispatched on port 0. This event me…
126 …"BriefDescription": "Number of RData beats (RVALID and RREADY) dispatched on port 1. This event me…
134 …"BriefDescription": "Number of RData beats (RVALID and RREADY) dispatched on port 2. This event me…
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a76/
H A Dbus.json8 …e data channels between the core and the SCU. If both read and write data beats are transferred on…
/linux/drivers/perf/
H A Dfsl_imx9_ddr_perf.c67 * V1 support 1 read transaction, 1 write transaction and 1 read beats
73 * V2 support 1 read beats and 3 write beats events which corresponding
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt96 inactive (high) between data beats of a burst write.
/linux/drivers/crypto/qce/
H A Dcommon.c51 u32 beats = (qce->burst_size >> 3) - 1; in qce_config_reg() local
55 config = (beats << REQ_SIZE_SHIFT) & REQ_SIZE_MASK; in qce_config_reg()
/linux/Documentation/admin-guide/
H A Djava.rst4 Linux beats them ALL! While all other OS's are TALKING about direct
/linux/drivers/dma/stm32/
H A Dstm32-dma3.c758 dev_dbg(chan2dev(chan), "%s: sdw=%u bytes sbl=%u beats ddw=%u bytes dbl=%u beats\n", in stm32_dma3_chan_prep_hw()
937 * FIFOL is also not sufficient, because it reflects the number of available write beats in in stm32_dma3_chan_set_residue()
1782 dev_dbg(&pdev->dev, "Burst is limited to %u beats through AXI port\n", in stm32_dma3_probe()
H A Dstm32-dma.c314 * If number of beats fit in several whole bursts in stm32_dma_fifo_threshold_is_allowed()
/linux/drivers/media/test-drivers/vidtv/
H A Dvidtv_s302m.c81 #define COMPASS 100 /* beats per minute */
/linux/arch/m68k/coldfire/
H A Dm53xx.c270 #define SDRAM_BL 8 /* # of beats in a burst */
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst552 5) Enable Address Aligned Beats::
/linux/include/linux/
H A Ddmaengine.h479 * or a register with the amount of bursts/beats/bytes that have been
/linux/drivers/media/dvb-frontends/
H A Dmxl5xx.c1036 * after first heart beats in firmware_download()
/linux/tools/perf/
H A Dbuiltin-kvm.c1355 pr_debug("Missed timer beats: %" PRIu64 "\n", c-1); in perf_kvm__handle_timerfd()
/linux/drivers/infiniband/hw/hfi1/
H A Dpio.c351 /* % beats absolute blocks */ in init_sc_pools_and_sizes()
/linux/Documentation/RCU/Design/Data-Structures/
H A DData-Structures.rst504 | #. But CPU 1 beats it to the punch, completing the current grace |
/linux/fs/xfs/libxfs/
H A Dxfs_alloc.c1061 * We have an aligned record that satisfies minlen and beats or matches in xfs_alloc_cur_check()