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/linux/drivers/firmware/tegra/
H A Dbpmp-tegra186.c12 #include <soc/tegra/bpmp.h>
13 #include <soc/tegra/bpmp-abi.h>
16 #include "bpmp-private.h"
82 static int tegra186_bpmp_ring_doorbell(struct tegra_bpmp *bpmp) in tegra186_bpmp_ring_doorbell() argument
84 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_ring_doorbell()
98 struct tegra_bpmp *bpmp = data; in tegra186_bpmp_ivc_notify() local
99 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_ivc_notify()
104 tegra186_bpmp_ring_doorbell(bpmp); in tegra186_bpmp_ivc_notify()
108 struct tegra_bpmp *bpmp, in tegra186_bpmp_channel_init() argument
111 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_channel_init()
[all …]
H A Dbpmp-tegra210.c12 #include <soc/tegra/bpmp.h>
14 #include "bpmp-private.h"
37 static u32 bpmp_channel_status(struct tegra_bpmp *bpmp, unsigned int index) in bpmp_channel_status() argument
39 struct tegra210_bpmp *priv = bpmp->priv; in bpmp_channel_status()
48 return bpmp_channel_status(channel->bpmp, index) == MA_ACKD(index); in tegra210_bpmp_is_response_ready()
55 return bpmp_channel_status(channel->bpmp, index) == SL_SIGL(index); in tegra210_bpmp_is_request_ready()
63 return bpmp_channel_status(channel->bpmp, index) == MA_FREE(index); in tegra210_bpmp_is_request_channel_free()
71 return bpmp_channel_status(channel->bpmp, index) == SL_QUED(index); in tegra210_bpmp_is_response_channel_free()
76 struct tegra210_bpmp *priv = channel->bpmp->priv; in tegra210_bpmp_post_request()
85 struct tegra210_bpmp *priv = channel->bpmp->priv; in tegra210_bpmp_post_response()
[all …]
H A DMakefile2 tegra-bpmp-y = bpmp.o
3 tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o
4 tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o
5 tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) += bpmp-tegra186.o
6 tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) += bpmp-tegra186.o
7 tegra-bpmp-$(CONFIG_ARCH_TEGRA_264_SOC) += bpmp-tegra186.o
8 tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o
9 obj-$(CONFIG_TEGRA_BPMP) += tegra-bpmp.o
H A Dbpmp-private.h9 #include <soc/tegra/bpmp.h>
12 int (*init)(struct tegra_bpmp *bpmp);
13 void (*deinit)(struct tegra_bpmp *bpmp);
22 int (*ring_doorbell)(struct tegra_bpmp *bpmp);
23 int (*resume)(struct tegra_bpmp *bpmp);
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml128 resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>,
129 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>,
130 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1>,
131 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP2>,
132 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP3>,
133 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP4>,
134 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP5>;
137 clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_DISP>,
138 <&bpmp TEGRA186_CLK_NVDISPLAY_DSC>,
139 <&bpmp TEGRA186_CLK_NVDISPLAYHUB>;
[all …]
H A Dnvidia,tegra20-dsi.yaml150 clocks = <&bpmp TEGRA186_CLK_DSI>,
151 <&bpmp TEGRA186_CLK_DSIA_LP>,
152 <&bpmp TEGRA186_CLK_PLLD>;
154 resets = <&bpmp TEGRA186_RESET_DSI>;
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
/linux/drivers/clk/tegra/
H A Dclk-bpmp.c11 #include <soc/tegra/bpmp.h>
12 #include <soc/tegra/bpmp-abi.h>
31 struct tegra_bpmp *bpmp; member
59 static int tegra_bpmp_clk_transfer(struct tegra_bpmp *bpmp, in tegra_bpmp_clk_transfer() argument
86 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_clk_transfer()
104 return tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_prepare()
117 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_unprepare()
119 dev_err(clk->bpmp->dev, "failed to disable clock %s: %d\n", in tegra_bpmp_clk_unprepare()
136 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_is_prepared()
160 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_recalc_rate()
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
14 The BPMP is a specific processor in Tegra chip, which is designed for
17 defines the resources that would be used by the BPMP firmware driver,
19 CPU and BPMP.
39 The BPMP implements some services which must be represented by
43 BPMP node.
45 Software can determine whether a child node of the BPMP node
49 provide configuration information regarding the BPMP itself, although
52 The BPMP firmware defines no single global name-/numbering-space for
[all …]
H A Dnvidia,tegra210-bpmp.txt1 NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
3 The Boot and Power Management Processor (BPMP) is a co-processor found
8 be used by the BPMP T210 firmware driver, which can create the
9 interprocessor communication (IPC) between the CPU and BPMP.
15 - "nvidia,tegra210-bpmp"
24 offloaded to bpmp.
28 bpmp@70016000 {
29 compatible = "nvidia,tegra210-bpmp";
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
185 resets = <&bpmp TEGRA234_RESET_GPCDMA>;
228 clocks = <&bpmp TEGRA234_CLK_APE>,
229 <&bpmp TEGRA234_CLK_APB2APE>;
231 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_AUD>;
241 clocks = <&bpmp TEGRA234_CLK_AHUB>;
243 assigned-clocks = <&bpmp TEGRA234_CLK_AHUB>;
244 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
256 clocks = <&bpmp TEGRA234_CLK_I2S1>,
257 <&bpmp TEGRA234_CLK_I2S1_SYNC_INPUT>;
[all …]
H A Dtegra264.dtsi7 #include <dt-bindings/power/nvidia,tegra264-bpmp.h>
22 compatible = "nvidia,tegra264-bpmp-shmem";
126 clocks = <&bpmp TEGRA264_CLK_APE>,
127 <&bpmp TEGRA264_CLK_ADSP>;
129 power-domains = <&bpmp TEGRA264_POWER_DOMAIN_AUD>;
205 clocks = <&bpmp TEGRA264_CLK_AHUB>;
213 clocks = <&bpmp TEGRA264_CLK_AHUB>;
215 assigned-clocks = <&bpmp TEGRA264_CLK_AHUB>;
216 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLAON_APE>;
228 clocks = <&bpmp TEGRA264_CLK_I2S1>,
[all …]
/linux/drivers/reset/tegra/
H A Dreset-bpmp.c8 #include <soc/tegra/bpmp.h>
9 #include <soc/tegra/bpmp-abi.h>
20 struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc); in tegra_bpmp_reset_common() local
34 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_reset_common()
67 int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp) in tegra_bpmp_init_resets() argument
69 bpmp->rstc.ops = &tegra_bpmp_reset_ops; in tegra_bpmp_init_resets()
70 bpmp->rstc.owner = THIS_MODULE; in tegra_bpmp_init_resets()
71 bpmp->rstc.of_node = bpmp->dev->of_node; in tegra_bpmp_init_resets()
72 bpmp->rstc.nr_resets = bpmp->soc->num_resets; in tegra_bpmp_init_resets()
74 return devm_reset_controller_register(bpmp->dev, &bpmp->rstc); in tegra_bpmp_init_resets()
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra186-bpmp-i2c.yaml4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
14 In Tegra186 and later, the BPMP (Boot and Power Management Processor)
17 the BPMP in order to execute transactions on that I2C bus. This
20 The BPMP I2C node must be located directly inside the main BPMP node.
21 See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP
28 const: nvidia,tegra186-bpmp-i2c
30 nvidia,bpmp-bus-id:
33 as defined by the BPMP firmware.
44 - nvidia,bpmp-bus-id
/linux/Documentation/devicetree/bindings/net/
H A Dnvidia,tegra234-mgbe.yaml124 clocks = <&bpmp TEGRA234_CLK_MGBE0_APP>,
125 <&bpmp TEGRA234_CLK_MGBE0_MAC>,
126 <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
127 <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
128 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
129 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>,
130 <&bpmp TEGRA234_CLK_MGBE0_TX>,
131 <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
132 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
133 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dnvidia,tegra186-bpmp-thermal.yaml4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra186-bpmp-thermal.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP thermal sensor
14 In Tegra186, the BPMP (Boot and Power Management Processor) implements
17 sensor that is exposed by BPMP.
19 The BPMP thermal node must be located directly inside the main BPMP
20 node. See ../firmware/nvidia,tegra186-bpmp.yaml for details of the
21 BPMP binding.
28 - nvidia,tegra186-bpmp-thermal
29 - nvidia,tegra194-bpmp-thermal
/linux/drivers/memory/tegra/
H A Dtegra186-emc.c15 #include <soc/tegra/bpmp.h>
27 struct tegra_bpmp *bpmp; member
173 err = tegra_bpmp_transfer(emc->bpmp, &msg); in tegra186_emc_get_emc_dvfs_latency()
179 dev_err(emc->dev, "EMC DVFS MRQ failed: %d (BPMP error code)\n", msg.rx.ret); in tegra186_emc_get_emc_dvfs_latency()
241 * Do nothing here as info to BPMP-FW is now passed in the BW set function
242 * of the MC driver. BPMP-FW sets the final Freq based on the passed values.
344 emc->bpmp = tegra_bpmp_get(&pdev->dev); in tegra186_emc_probe()
345 if (IS_ERR(emc->bpmp)) in tegra186_emc_probe()
346 return dev_err_probe(&pdev->dev, PTR_ERR(emc->bpmp), in tegra186_emc_probe()
347 "failed to get BPMP\n"); in tegra186_emc_probe()
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dnvidia,tegra186-xusb.yaml145 clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
146 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
147 <&bpmp TEGRA186_CLK_XUSB_SS>,
148 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
149 <&bpmp TEGRA186_CLK_CLK_M>,
150 <&bpmp TEGRA186_CLK_XUSB_FS>,
151 <&bpmp TEGRA186_CLK_PLLU>,
152 <&bpmp TEGRA186_CLK_CLK_M>,
153 <&bpmp TEGRA186_CLK_PLLE>;
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
[all …]
H A Dnvidia,tegra194-xusb.yaml148 clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
149 <&bpmp TEGRA194_CLK_XUSB_FALCON>,
150 <&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
151 <&bpmp TEGRA194_CLK_XUSB_SS>,
152 <&bpmp TEGRA194_CLK_CLK_M>,
153 <&bpmp TEGRA194_CLK_XUSB_FS>,
154 <&bpmp TEGRA194_CLK_UTMIPLL>,
155 <&bpmp TEGRA194_CLK_CLK_M>,
156 <&bpmp TEGRA194_CLK_PLLE>;
166 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
[all …]
H A Dnvidia,tegra234-xusb.yaml160 clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
161 <&bpmp TEGRA234_CLK_XUSB_FALCON>,
162 <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
163 <&bpmp TEGRA234_CLK_XUSB_SS>,
164 <&bpmp TEGRA234_CLK_CLK_M>,
165 <&bpmp TEGRA234_CLK_XUSB_FS>,
166 <&bpmp TEGRA234_CLK_UTMIP_PLL>,
167 <&bpmp TEGRA234_CLK_CLK_M>,
168 <&bpmp TEGRA234_CLK_PLLE>;
178 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
[all …]
/linux/drivers/cpufreq/
H A Dtegra186-cpufreq.c13 #include <soc/tegra/bpmp.h>
14 #include <soc/tegra/bpmp-abi.h>
143 * Cross check the frequencies from BPMP-FW LUT against the OPP's present in DT. in tegra_cpufreq_init_cpufreq_table()
260 struct platform_device *pdev, struct tegra_bpmp *bpmp, in tegra_cpufreq_bpmp_read_lut() argument
272 virt = dma_alloc_coherent(bpmp->dev, sizeof(*data), &phys, in tegra_cpufreq_bpmp_read_lut()
288 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_cpufreq_bpmp_read_lut()
345 dma_free_coherent(bpmp->dev, sizeof(*data), virt, phys); in tegra_cpufreq_bpmp_read_lut()
353 struct tegra_bpmp *bpmp; in tegra186_cpufreq_probe() local
367 bpmp = tegra_bpmp_get(&pdev->dev); in tegra186_cpufreq_probe()
368 if (IS_ERR(bpmp)) in tegra186_cpufreq_probe()
[all …]
/linux/Documentation/devicetree/bindings/arm/
H A Dnvidia,tegra194-ccplex.yaml27 nvidia,bpmp:
30 Specifies the bpmp node that needs to be queried to get
39 nvidia,bpmp = <&bpmp>;
/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra186-dspk.yaml93 clocks = <&bpmp TEGRA186_CLK_DSPK1>;
95 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
96 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
/linux/drivers/thermal/tegra/
H A DKconfig15 tristate "Tegra BPMP thermal sensing"
19 Tegra systems-on-chip with the BPMP coprocessor (Tegra186).
/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra20-pcie.txt10 - power-domains: To ungate power partition by BPMP powergate driver. Must
11 contain BPMP phandle and PCIe power partition ID. This is required only
568 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_PCX>;
594 clocks = <&bpmp TEGRA186_CLK_AFI>,
595 <&bpmp TEGRA186_CLK_PCIE>,
596 <&bpmp TEGRA186_CLK_PLLE>;
599 resets = <&bpmp TEGRA186_RESET_AFI>,
600 <&bpmp TEGRA186_RESET_PCIE>,
601 <&bpmp TEGRA186_RESET_PCIEXCLK>;
/linux/include/dt-bindings/memory/
H A Dtegra186-mc.h73 * The BPMP has its SID value hardcoded in the firmware. Changing it requires
217 /* BPMP read client */
219 /* BPMP write client */

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