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/linux/drivers/firmware/tegra/
H A Dbpmp.c17 #include <soc/tegra/bpmp.h>
18 #include <soc/tegra/bpmp-abi.h>
21 #include "bpmp-private.h"
30 struct tegra_bpmp *bpmp = channel->bpmp; in channel_to_ops() local
32 return bpmp->soc->ops; in channel_to_ops()
38 struct tegra_bpmp *bpmp; in tegra_bpmp_get() local
41 np = of_parse_phandle(dev->of_node, "nvidia,bpmp", 0); in tegra_bpmp_get()
47 bpmp = ERR_PTR(-ENODEV); in tegra_bpmp_get()
51 bpmp = platform_get_drvdata(pdev); in tegra_bpmp_get()
52 if (!bpmp) { in tegra_bpmp_get()
[all …]
H A Dbpmp-tegra186.c12 #include <soc/tegra/bpmp.h>
13 #include <soc/tegra/bpmp-abi.h>
16 #include "bpmp-private.h"
82 static int tegra186_bpmp_ring_doorbell(struct tegra_bpmp *bpmp) in tegra186_bpmp_ring_doorbell() argument
84 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_ring_doorbell()
98 struct tegra_bpmp *bpmp = data; in tegra186_bpmp_ivc_notify() local
99 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_ivc_notify()
104 tegra186_bpmp_ring_doorbell(bpmp); in tegra186_bpmp_ivc_notify()
108 struct tegra_bpmp *bpmp, in tegra186_bpmp_channel_init() argument
111 struct tegra186_bpmp *priv = bpmp->priv; in tegra186_bpmp_channel_init()
[all …]
H A Dbpmp-tegra210.c12 #include <soc/tegra/bpmp.h>
14 #include "bpmp-private.h"
37 static u32 bpmp_channel_status(struct tegra_bpmp *bpmp, unsigned int index) in bpmp_channel_status() argument
39 struct tegra210_bpmp *priv = bpmp->priv; in bpmp_channel_status()
48 return bpmp_channel_status(channel->bpmp, index) == MA_ACKD(index); in tegra210_bpmp_is_response_ready()
55 return bpmp_channel_status(channel->bpmp, index) == SL_SIGL(index); in tegra210_bpmp_is_request_ready()
63 return bpmp_channel_status(channel->bpmp, index) == MA_FREE(index); in tegra210_bpmp_is_request_channel_free()
71 return bpmp_channel_status(channel->bpmp, index) == SL_QUED(index); in tegra210_bpmp_is_response_channel_free()
76 struct tegra210_bpmp *priv = channel->bpmp->priv; in tegra210_bpmp_post_request()
85 struct tegra210_bpmp *priv = channel->bpmp->priv; in tegra210_bpmp_post_response()
[all …]
H A Dbpmp-debugfs.c10 #include <soc/tegra/bpmp.h>
11 #include <soc/tegra/bpmp-abi.h>
69 /* map filename in Linux debugfs to corresponding entry in BPMP */
70 static const char *get_filename(struct tegra_bpmp *bpmp, in get_filename() argument
82 root_path = dentry_path(bpmp->debugfs_mirror, root_path_buf, in get_filename()
107 static int mrq_debug_open(struct tegra_bpmp *bpmp, const char *name, in mrq_debug_open() argument
134 err = tegra_bpmp_transfer(bpmp, &msg); in mrq_debug_open()
146 static int mrq_debug_close(struct tegra_bpmp *bpmp, u32 fd) in mrq_debug_close() argument
168 err = tegra_bpmp_transfer(bpmp, &msg); in mrq_debug_close()
177 static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name, in mrq_debug_read() argument
[all …]
H A DMakefile2 tegra-bpmp-y = bpmp.o
3 tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o
4 tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o
5 tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) += bpmp-tegra186.o
6 tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) += bpmp-tegra186.o
7 tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o
8 obj-$(CONFIG_TEGRA_BPMP) += tegra-bpmp.o
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
55 clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
56 <&bpmp TEGRA186_CLK_EQOS_AXI>,
57 <&bpmp TEGRA186_CLK_EQOS_RX>,
58 <&bpmp TEGRA186_CLK_EQOS_TX>,
59 <&bpmp TEGRA186_CLK_EQOS_PTP_REF>;
61 resets = <&bpmp TEGRA186_RESET_EQOS>;
79 resets = <&bpmp TEGRA186_RESET_GPCDMA>;
123 clocks = <&bpmp TEGRA186_CLK_APE>,
124 <&bpmp TEGRA186_CLK_APB2APE>;
[all …]
H A Dtegra194.dtsi10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
148 clocks = <&bpmp TEGRA194_CLK_AXI_CBB>,
149 <&bpmp TEGRA194_CLK_EQOS_AXI>,
150 <&bpmp TEGRA194_CLK_EQOS_RX>,
151 <&bpmp TEGRA194_CLK_EQOS_TX>,
152 <&bpmp TEGRA194_CLK_EQOS_PTP_REF>;
154 resets = <&bpmp TEGRA194_RESET_EQOS>;
173 resets = <&bpmp TEGRA194_RESET_GPCDMA>;
217 clocks = <&bpmp TEGRA194_CLK_APE>,
218 <&bpmp TEGRA194_CLK_APB2APE>;
[all …]
H A Dtegra234.dtsi11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
124 resets = <&bpmp TEGRA234_RESET_GPCDMA>;
167 clocks = <&bpmp TEGRA234_CLK_APE>,
168 <&bpmp TEGRA234_CLK_APB2APE>;
170 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_AUD>;
180 clocks = <&bpmp TEGRA234_CLK_AHUB>;
182 assigned-clocks = <&bpmp TEGRA234_CLK_AHUB>;
183 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
195 clocks = <&bpmp TEGRA234_CLK_I2S1>,
196 <&bpmp TEGRA234_CLK_I2S1_SYNC_INPUT>;
[all …]
/linux/drivers/pmdomain/tegra/
H A Dpowergate-bpmp.c11 #include <soc/tegra/bpmp.h>
12 #include <soc/tegra/bpmp-abi.h>
21 struct tegra_bpmp *bpmp; member
31 static int tegra_bpmp_powergate_set_state(struct tegra_bpmp *bpmp, in tegra_bpmp_powergate_set_state() argument
48 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_powergate_set_state()
57 static int tegra_bpmp_powergate_get_state(struct tegra_bpmp *bpmp, in tegra_bpmp_powergate_get_state() argument
78 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_powergate_get_state()
87 static int tegra_bpmp_powergate_get_max_id(struct tegra_bpmp *bpmp) in tegra_bpmp_powergate_get_max_id() argument
106 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_powergate_get_max_id()
115 static char *tegra_bpmp_powergate_get_name(struct tegra_bpmp *bpmp, in tegra_bpmp_powergate_get_name() argument
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml128 resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>,
129 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>,
130 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1>,
131 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP2>,
132 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP3>,
133 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP4>,
134 <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP5>;
137 clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_DISP>,
138 <&bpmp TEGRA186_CLK_NVDISPLAY_DSC>,
139 <&bpmp TEGRA186_CLK_NVDISPLAYHUB>;
[all …]
/linux/drivers/clk/tegra/
H A Dclk-bpmp.c11 #include <soc/tegra/bpmp.h>
12 #include <soc/tegra/bpmp-abi.h>
31 struct tegra_bpmp *bpmp; member
59 static int tegra_bpmp_clk_transfer(struct tegra_bpmp *bpmp, in tegra_bpmp_clk_transfer() argument
86 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_clk_transfer()
104 return tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_prepare()
117 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_unprepare()
119 dev_err(clk->bpmp->dev, "failed to disable clock %s: %d\n", in tegra_bpmp_clk_unprepare()
136 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_is_prepared()
160 err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); in tegra_bpmp_clk_recalc_rate()
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
14 The BPMP is a specific processor in Tegra chip, which is designed for
17 defines the resources that would be used by the BPMP firmware driver,
19 CPU and BPMP.
39 The BPMP implements some services which must be represented by
43 BPMP node.
45 Software can determine whether a child node of the BPMP node
49 provide configuration information regarding the BPMP itself, although
52 The BPMP firmware defines no single global name-/numbering-space for
[all …]
H A Dnvidia,tegra210-bpmp.txt1 NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
3 The Boot and Power Management Processor (BPMP) is a co-processor found
8 be used by the BPMP T210 firmware driver, which can create the
9 interprocessor communication (IPC) between the CPU and BPMP.
15 - "nvidia,tegra210-bpmp"
24 offloaded to bpmp.
28 bpmp@70016000 {
29 compatible = "nvidia,tegra210-bpmp";
/linux/include/soc/tegra/
H A Dbpmp.h16 #include <soc/tegra/bpmp-abi.h>
53 struct tegra_bpmp *bpmp; member
130 void tegra_bpmp_put(struct tegra_bpmp *bpmp);
131 int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,
133 int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,
138 int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
140 void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
142 bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq);
148 static inline void tegra_bpmp_put(struct tegra_bpmp *bpmp) in tegra_bpmp_put() argument
151 static inline int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp, in tegra_bpmp_transfer_atomic() argument
[all …]
H A Dbpmp-abi.h44 * @brief Messages sent to/from BPMP via IPC
56 * The CPU requests the BPMP to perform a particular service by
61 * The BPMP processes the data and replies with an IVC frame (on the
67 * BPMP can lead to BPMP eventually sending an MRQ message to the
69 * a thermal trip point, the BPMP may eventually send a single
79 * at BPMP. For requests originating in BPMP, this flag is optional except
223 * calculated by BPMP, -BPMP_EBADMSG will be returned and the request will
375 * BPMP. Subject to change in future
429 * * Targets: BPMP
433 * Behavior is equivalent to a simple #MRQ_PING except that BPMP
[all …]
/linux/drivers/reset/tegra/
H A Dreset-bpmp.c8 #include <soc/tegra/bpmp.h>
9 #include <soc/tegra/bpmp-abi.h>
20 struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc); in tegra_bpmp_reset_common() local
34 err = tegra_bpmp_transfer(bpmp, &msg); in tegra_bpmp_reset_common()
67 int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp) in tegra_bpmp_init_resets() argument
69 bpmp->rstc.ops = &tegra_bpmp_reset_ops; in tegra_bpmp_init_resets()
70 bpmp->rstc.owner = THIS_MODULE; in tegra_bpmp_init_resets()
71 bpmp->rstc.of_node = bpmp->dev->of_node; in tegra_bpmp_init_resets()
72 bpmp->rstc.nr_resets = bpmp->soc->num_resets; in tegra_bpmp_init_resets()
74 return devm_reset_controller_register(bpmp->dev, &bpmp->rstc); in tegra_bpmp_init_resets()
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra186-bpmp-i2c.yaml4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
14 In Tegra186 and later, the BPMP (Boot and Power Management Processor)
17 the BPMP in order to execute transactions on that I2C bus. This
20 The BPMP I2C node must be located directly inside the main BPMP node.
21 See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP
28 const: nvidia,tegra186-bpmp-i2c
30 nvidia,bpmp-bus-id:
33 as defined by the BPMP firmware.
44 - nvidia,bpmp-bus-id
/linux/Documentation/devicetree/bindings/net/
H A Dnvidia,tegra234-mgbe.yaml124 clocks = <&bpmp TEGRA234_CLK_MGBE0_APP>,
125 <&bpmp TEGRA234_CLK_MGBE0_MAC>,
126 <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
127 <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
128 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
129 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>,
130 <&bpmp TEGRA234_CLK_MGBE0_TX>,
131 <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
132 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
133 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dnvidia,tegra186-bpmp-thermal.yaml4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra186-bpmp-thermal.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP thermal sensor
14 In Tegra186, the BPMP (Boot and Power Management Processor) implements
17 sensor that is exposed by BPMP.
19 The BPMP thermal node must be located directly inside the main BPMP
20 node. See ../firmware/nvidia,tegra186-bpmp.yaml for details of the
21 BPMP binding.
28 - nvidia,tegra186-bpmp-thermal
29 - nvidia,tegra194-bpmp-thermal
/linux/drivers/memory/tegra/
H A Dtegra186-emc.c13 #include <soc/tegra/bpmp.h>
22 struct tegra_bpmp *bpmp; member
167 err = tegra_bpmp_transfer(emc->bpmp, &msg); in tegra186_emc_get_emc_dvfs_latency()
173 dev_err(emc->dev, "EMC DVFS MRQ failed: %d (BPMP error code)\n", msg.rx.ret); in tegra186_emc_get_emc_dvfs_latency()
225 * Do nothing here as info to BPMP-FW is now passed in the BW set function
226 * of the MC driver. BPMP-FW sets the final Freq based on the passed values.
323 emc->bpmp = tegra_bpmp_get(&pdev->dev); in tegra186_emc_probe()
324 if (IS_ERR(emc->bpmp)) in tegra186_emc_probe()
325 return dev_err_probe(&pdev->dev, PTR_ERR(emc->bpmp), "failed to get BPMP\n"); in tegra186_emc_probe()
337 if (tegra_bpmp_mrq_is_supported(emc->bpmp, MRQ_EMC_DVFS_LATENCY)) { in tegra186_emc_probe()
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dnvidia,tegra234-xusb.yaml133 clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
134 <&bpmp TEGRA234_CLK_XUSB_FALCON>,
135 <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
136 <&bpmp TEGRA234_CLK_XUSB_SS>,
137 <&bpmp TEGRA234_CLK_CLK_M>,
138 <&bpmp TEGRA234_CLK_XUSB_FS>,
139 <&bpmp TEGRA234_CLK_UTMIP_PLL>,
140 <&bpmp TEGRA234_CLK_CLK_M>,
141 <&bpmp TEGRA234_CLK_PLLE>;
151 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
[all …]
H A Dnvidia,tegra186-xusb.yaml145 clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
146 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
147 <&bpmp TEGRA186_CLK_XUSB_SS>,
148 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
149 <&bpmp TEGRA186_CLK_CLK_M>,
150 <&bpmp TEGRA186_CLK_XUSB_FS>,
151 <&bpmp TEGRA186_CLK_PLLU>,
152 <&bpmp TEGRA186_CLK_CLK_M>,
153 <&bpmp TEGRA186_CLK_PLLE>;
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
[all …]
H A Dnvidia,tegra194-xusb.yaml148 clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
149 <&bpmp TEGRA194_CLK_XUSB_FALCON>,
150 <&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
151 <&bpmp TEGRA194_CLK_XUSB_SS>,
152 <&bpmp TEGRA194_CLK_CLK_M>,
153 <&bpmp TEGRA194_CLK_XUSB_FS>,
154 <&bpmp TEGRA194_CLK_UTMIPLL>,
155 <&bpmp TEGRA194_CLK_CLK_M>,
156 <&bpmp TEGRA194_CLK_PLLE>;
166 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra194-pcie-ep.yaml116 nvidia,bpmp:
119 Must contain a pair of phandles to BPMP controller node followed by
147 - description: phandle to BPMP controller node
204 - nvidia,bpmp
229 clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>;
232 resets = <&bpmp TEGRA194_RESET_PEX1_CORE_5_APB>,
233 <&bpmp TEGRA194_RESET_PEX1_CORE_5>;
236 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
240 nvidia,bpmp = <&bpmp 5>;
278 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX8A>;
[all …]
/linux/Documentation/devicetree/bindings/gpu/
H A Dnvidia,gk20a.txt87 clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
88 <&bpmp TEGRA186_CLK_GPU>;
90 resets = <&bpmp TEGRA186_RESET_GPU>;
92 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
105 clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
106 <&bpmp TEGRA194_CLK_GPU_PWR>,
107 <&bpmp TEGRA194_CLK_FUSE>;
109 resets = <&bpmp TEGRA194_RESET_GPU>;
113 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;

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