/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
H A D | base.c | 27 nvkm_bar_flush(struct nvkm_bar *bar) in nvkm_bar_flush() argument 29 if (bar && bar->func->flush) in nvkm_bar_flush() 30 bar->func->flush(bar); in nvkm_bar_flush() 36 return device->bar->func->bar1.vmm(device->bar); in nvkm_bar_bar1_vmm() 42 struct nvkm_bar *bar = device->bar; in nvkm_bar_bar1_reset() local 43 if (bar) { in nvkm_bar_bar1_reset() 44 bar->func->bar1.init(bar); in nvkm_bar_bar1_reset() 45 bar->func->bar1.wait(bar); in nvkm_bar_bar1_reset() 55 struct nvkm_bar *bar = device->bar; in nvkm_bar_bar2_vmm() local 56 if (bar && bar->bar2) in nvkm_bar_bar2_vmm() [all …]
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H A D | tu102.c | 29 tu102_bar_bar2_wait(struct nvkm_bar *bar) in tu102_bar_bar2_wait() argument 31 struct nvkm_device *device = bar->subdev.device; in tu102_bar_bar2_wait() 39 tu102_bar_bar2_fini(struct nvkm_bar *bar) in tu102_bar_bar2_fini() argument 41 nvkm_mask(bar->subdev.device, 0xb80f48, 0x80000000, 0x00000000); in tu102_bar_bar2_fini() 48 struct gf100_bar *bar = gf100_bar(base); in tu102_bar_bar2_init() local 49 u32 addr = nvkm_memory_addr(bar->bar[0].inst) >> 12; in tu102_bar_bar2_init() 50 if (bar->bar2_halve) in tu102_bar_bar2_init() 56 tu102_bar_bar1_wait(struct nvkm_bar *bar) in tu102_bar_bar1_wait() argument 58 struct nvkm_device *device = bar->subdev.device; in tu102_bar_bar1_wait() 66 tu102_bar_bar1_fini(struct nvkm_bar *bar) in tu102_bar_bar1_fini() argument [all …]
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/linux/drivers/net/ethernet/netronome/nfp/nfpcore/ |
H A D | nfp6000_pcie.c | 15 * abstraction builds upon this BAR interface. 98 #define NFP_PCIE_P2C_FIXED_SIZE(bar) (1 << (bar)->bitsize) argument 99 #define NFP_PCIE_P2C_BULK_SIZE(bar) (1 << (bar)->bitsize) argument 100 #define NFP_PCIE_P2C_GENERAL_TARGET_OFFSET(bar, x) ((x) << ((bar)->bitsize - 2)) argument 101 #define NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(bar, x) ((x) << ((bar)->bitsize - 4)) argument 102 #define NFP_PCIE_P2C_GENERAL_SIZE(bar) (1 << ((bar)->bitsize - 4)) argument 116 * struct nfp_bar - describes BAR configuration and usage 118 * @barcfg: cached contents of BAR config CSR 119 * @base: the BAR's base CPP offset 120 * @mask: mask for the BAR aperture (read only) [all …]
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/linux/drivers/pci/ |
H A D | iomap.c | 15 * pci_iomap_range - create a virtual mapping cookie for a PCI BAR 16 * @dev: PCI device that owns the BAR 17 * @bar: BAR number 18 * @offset: map memory at the given offset in BAR 21 * Using this function you will get a __iomem address to your device BAR. 27 * the complete BAR from offset to the end, pass %0 here. 30 int bar, in pci_iomap_range() argument 37 if (!pci_bar_index_is_valid(bar)) in pci_iomap_range() 40 start = pci_resource_start(dev, bar); in pci_iomap_range() 41 len = pci_resource_len(dev, bar); in pci_iomap_range() [all …]
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H A D | devres.c | 38 /* A requested region spanning an entire BAR. */ 42 * A requested region spanning an entire BAR, and a mapping for 43 * the entire BAR. 48 * A mapping within a BAR, either spanning the whole BAR or just a 64 int bar; member 70 res->bar = -1; in pcim_addr_devres_clear() 80 pci_release_region(pdev, res->bar); in pcim_addr_resource_release() 84 pci_release_region(pdev, res->bar); in pcim_addr_resource_release() 128 return a->bar == b->bar; in pcim_addr_resources_match() 294 static inline bool mask_contains_bar(int mask, int bar) in mask_contains_bar() argument [all …]
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/linux/drivers/pci/controller/cadence/ |
H A D | pcie-cadence-host.c | 215 * Set the root complex BAR configuration register: in cdns_pcie_host_init_root_port() 249 enum cdns_pcie_rp_bar bar, in cdns_pcie_host_bar_ib_config() argument 256 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_bar_ib_config() 259 rc->avail_ib_bar[bar] = false; in cdns_pcie_host_bar_ib_config() 265 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR0(bar), addr0); in cdns_pcie_host_bar_ib_config() 266 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar), addr1); in cdns_pcie_host_bar_ib_config() 268 if (bar == RP_NO_BAR) in cdns_pcie_host_bar_ib_config() 272 value &= ~(LM_RC_BAR_CFG_CTRL_MEM_64BITS(bar) | in cdns_pcie_host_bar_ib_config() 273 LM_RC_BAR_CFG_CTRL_PREF_MEM_64BITS(bar) | in cdns_pcie_host_bar_ib_config() 274 LM_RC_BAR_CFG_CTRL_MEM_32BITS(bar) | in cdns_pcie_host_bar_ib_config() [all …]
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/linux/tools/testing/selftests/bpf/prog_tests/ |
H A D | cgroup_attach_override.c | 8 #define BAR "/foo/bar/" macro 28 int drop_prog = -1, allow_prog = -1, foo = -1, bar = -1; in serial_test_cgroup_attach_override() local 55 bar = test__join_cgroup(BAR); in serial_test_cgroup_attach_override() 56 if (CHECK(bar < 0, "cgroup_join_bar", "cgroup setup failed\n")) in serial_test_cgroup_attach_override() 63 if (CHECK(bpf_prog_attach(allow_prog, bar, BPF_CGROUP_INET_EGRESS, in serial_test_cgroup_attach_override() 66 "attach prog to %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 72 if (CHECK(bpf_prog_detach(bar, BPF_CGROUP_INET_EGRESS), in serial_test_cgroup_attach_override() 74 "detach prog from %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 81 if (CHECK(bpf_prog_attach(allow_prog, bar, BPF_CGROUP_INET_EGRESS, in serial_test_cgroup_attach_override() 84 "attach prog to %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() [all …]
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H A D | linked_list.c | 89 "but arg is at offset=0 in struct bar" }, 296 id = btf__add_struct(btf, "bar", refcount_field ? 60 : 56); in list_and_rb_node_same_struct() 297 if (!ASSERT_GT(id, 0, "btf__add_struct bar")) in list_and_rb_node_same_struct() 300 if (!ASSERT_OK(err, "btf__add_field bar::a")) in list_and_rb_node_same_struct() 303 if (!ASSERT_OK(err, "btf__add_field bar::c")) in list_and_rb_node_same_struct() 307 if (!ASSERT_OK(err, "btf__add_field bar::ref")) in list_and_rb_node_same_struct() 320 id = btf__add_decl_tag(btf, "contains:bar:a", foo_btf_id, 0); in list_and_rb_node_same_struct() 321 if (!ASSERT_GT(id, 0, "btf__add_decl_tag contains:bar:a")) in list_and_rb_node_same_struct() 442 id = btf__add_decl_tag(btf, "contains:bar:bar", 5, 1); in test_btf() 443 if (!ASSERT_EQ(id, 6, "btf__add_decl_tag contains:bar:bar")) in test_btf() [all …]
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/linux/drivers/net/ethernet/sfc/ |
H A D | ef100.c | 37 unsigned int bar; member 71 u32 bar = ef100_pci_get_bar_bits(efx, entry_location, EF100_BAR); in ef100_pci_parse_ef100_entry() local 74 "Found EF100 function control window bar=%d offset=0x%llx\n", in ef100_pci_parse_ef100_entry() 75 bar, offset); in ef100_pci_parse_ef100_entry() 83 if (bar == ESE_GZ_CFGBAR_EF100_BAR_NUM_EXPANSION_ROM || in ef100_pci_parse_ef100_entry() 84 bar == ESE_GZ_CFGBAR_EF100_BAR_NUM_INVALID) { in ef100_pci_parse_ef100_entry() 86 "Bad BAR value of %d in Xilinx capabilities EF100 entry.\n", in ef100_pci_parse_ef100_entry() 87 bar); in ef100_pci_parse_ef100_entry() 91 result->bar = bar; in ef100_pci_parse_ef100_entry() 97 static bool ef100_pci_does_bar_overflow(struct efx_nic *efx, int bar, in ef100_pci_does_bar_overflow() argument [all …]
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/linux/drivers/gpu/nova-core/fb/hal/ |
H A D | ga100.rs | 13 pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 { in read_sysmem_flush_page_ga100() 14 u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT in read_sysmem_flush_page_ga100() 15 | u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40()) in read_sysmem_flush_page_ga100() 19 pub(super) fn write_sysmem_flush_page_ga100(bar: &Bar0, addr: u64) { in write_sysmem_flush_page_ga100() 22 .write(bar); in write_sysmem_flush_page_ga100() 25 .write(bar); in write_sysmem_flush_page_ga100() 28 pub(super) fn display_enabled_ga100(bar: &Bar0) -> bool { in display_enabled_ga100() 29 !regs::ga100::NV_FUSE_STATUS_OPT_DISPLAY::read(bar).display_disabled() in display_enabled_ga100() 37 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { in read_sysmem_flush_page() 38 read_sysmem_flush_page_ga100(bar) in read_sysmem_flush_page() [all …]
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H A D | tu102.rs | 12 pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 { in read_sysmem_flush_page_gm107() 13 u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT in read_sysmem_flush_page_gm107() 16 pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { in write_sysmem_flush_page_gm107() 21 .write(bar); in write_sysmem_flush_page_gm107() 29 pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { in display_enabled_gm107() 30 !regs::gm107::NV_FUSE_STATUS_OPT_DISPLAY::read(bar).display_disabled() in display_enabled_gm107() 33 pub(super) fn vidmem_size_gp102(bar: &Bar0) -> u64 { in vidmem_size_gp102() 34 regs::NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE::read(bar).usable_fb_size() in vidmem_size_gp102() 40 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { in read_sysmem_flush_page() 41 read_sysmem_flush_page_gm107(bar) in read_sysmem_flush_page() [all …]
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H A D | ga102.rs | 9 fn vidmem_size_ga102(bar: &Bar0) -> u64 { in vidmem_size_ga102() 10 regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size() in vidmem_size_ga102() 16 fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { in read_sysmem_flush_page() 17 super::ga100::read_sysmem_flush_page_ga100(bar) in read_sysmem_flush_page() 20 fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { in write_sysmem_flush_page() 21 super::ga100::write_sysmem_flush_page_ga100(bar, addr); in write_sysmem_flush_page() 26 fn supports_display(&self, bar: &Bar0) -> bool { in supports_display() 27 super::ga100::display_enabled_ga100(bar) in supports_display() 30 fn vidmem_size(&self, bar: &Bar0) -> u64 { in vidmem_size() 31 vidmem_size_ga102(bar) in vidmem_size()
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/linux/drivers/pci/endpoint/ |
H A D | pci-epf-core.c | 215 * @bar: the BAR number corresponding to the register space 220 void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar, in pci_epf_free_space() argument 232 epf_bar = epf->bar; in pci_epf_free_space() 239 dma_free_coherent(dev, epf_bar[bar].aligned_size, addr, in pci_epf_free_space() 240 epf_bar[bar].phys_addr); in pci_epf_free_space() 242 epf_bar[bar].phys_addr = 0; in pci_epf_free_space() 243 epf_bar[bar].addr = NULL; in pci_epf_free_space() 244 epf_bar[bar].size = 0; in pci_epf_free_space() 245 epf_bar[bar].aligned_size = 0; in pci_epf_free_space() 246 epf_bar[bar].barno = 0; in pci_epf_free_space() [all …]
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/linux/samples/trace_events/ |
H A D | trace-events-sample.h | 70 * Here it is trace_foo_bar(char *foo, int bar). 73 * Here it is simply "foo, bar". 94 * __field_struct(struct bar, foo) 96 * __entry->bar.x = y; 108 * memcpy(__entry->foo, bar, 10); 119 * __dynamic_array( int, foo, bar) is similar to: int foo[bar]; 124 * memcpy(__get_dynamic_array(foo), bar, 10); 135 * __string(foo, bar) is similar to: strcpy(foo, bar) 175 * __string_len(foo, bar, len) 186 * memcpy(__get_str(foo), bar, len); [all …]
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/linux/drivers/gpu/drm/xe/tests/ |
H A D | xe_args_test.c | 13 #define bar COUNT_ARGS(foo) in call_args_example() macro 16 KUNIT_EXPECT_EQ(test, bar, 1); in call_args_example() 20 #undef bar in call_args_example() 27 #define bar CALL_ARGS(COUNT_ARGS, DROP_FIRST_ARG(foo)) in drop_first_arg_example() macro 29 KUNIT_EXPECT_EQ(test, bar, 3); in drop_first_arg_example() 32 #undef bar in drop_first_arg_example() 40 #define bar FIRST_ARG(foo) in first_arg_example() macro 42 KUNIT_EXPECT_EQ(test, bar, X); in first_arg_example() 43 KUNIT_EXPECT_STREQ(test, __stringify(bar), "X"); in first_arg_example() 46 #undef bar in first_arg_example() [all …]
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/linux/arch/powerpc/platforms/powernv/ |
H A D | pci-sriov.c | 15 * the PHB maps MMIO addresses to a specific PE using the "Memory BAR Table". 24 * For a SR-IOV BAR things are a little more awkward since size and alignment 25 * are not coupled. The alignment is set based on the per-VF BAR size, but 26 * the total BAR area is: number-of-vfs * per-vf-size. The number of VFs 28 * we need to finesse (read: hack) the Linux BAR allocator so that it will 33 * so as a baseline we can assume that we have the following BAR modes 38 * a) A segmented BAR that splits the mapped range into $PE_COUNT equally sized 40 * b) An un-segmented BAR that maps the whole address range to a specific PE. 43 * We prefer to use mode a) since it only requires one MBT entry per SR-IOV BAR 44 * For comparison b) requires one entry per-VF per-BAR, or: [all …]
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/linux/drivers/xen/xen-pciback/ |
H A D | conf_space_header.c | 129 struct pci_bar_info *bar = data; in rom_write() local 131 if (unlikely(!bar)) { in rom_write() 140 bar->which = 1; in rom_write() 144 if (tmpval != bar->val && value == bar->val) { in rom_write() 145 /* Allow restoration of bar value. */ in rom_write() 146 pci_write_config_dword(dev, offset, bar->val); in rom_write() 148 bar->which = 0; in rom_write() 162 struct pci_bar_info *bar = data; in bar_write() local 167 if (unlikely(!bar)) { in bar_write() 182 bar->which = 1; in bar_write() [all …]
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/linux/drivers/dma/dw-edma/ |
H A D | dw-edma-pcie.c | 28 .bar = a, \ 34 enum pci_barno bar; member 57 .rg.bar = BAR_0, 62 /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */ 64 /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */ 68 /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */ 70 /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */ 75 /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */ 77 /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */ 81 /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */ [all …]
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/linux/drivers/pci/controller/dwc/ |
H A D | pcie-designware-ep.c | 40 enum pci_barno bar, int flags) in __dw_pcie_ep_reset_bar() argument 45 reg = PCI_BASE_ADDRESS_0 + (4 * bar); in __dw_pcie_ep_reset_bar() 57 * dw_pcie_ep_reset_bar - Reset endpoint BAR 59 * @bar: BAR number of the endpoint 61 void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) in dw_pcie_ep_reset_bar() argument 68 __dw_pcie_ep_reset_bar(pci, func_no, bar, 0); in dw_pcie_ep_reset_bar() 143 dma_addr_t parent_bus_addr, enum pci_barno bar, in dw_pcie_ep_inbound_atu() argument 150 if (!ep->bar_to_atu[bar]) in dw_pcie_ep_inbound_atu() 153 free_win = ep->bar_to_atu[bar] - 1; in dw_pcie_ep_inbound_atu() 161 parent_bus_addr, bar, size); in dw_pcie_ep_inbound_atu() [all …]
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/linux/tools/perf/Documentation/ |
H A D | callchain-overhead-calculation.txt | 29 void bar(void) { 35 bar() 40 In this case 'foo' is a child of 'bar', and 'bar' is an immediate 42 'main' is a parent of 'foo' and 'bar', and 'bar' is a parent of 'foo'. 44 Suppose all samples are recorded in 'foo' and 'bar' only. When it's 54 bar 58 40.00% bar 60 --- bar [all...] |
/linux/drivers/misc/ |
H A D | pci_endpoint_test.c | 121 void __iomem *bar[PCI_STD_NUM_BARS]; member 284 memcpy_toio(test->bar[barno] + offset, write_buf, size); in pci_endpoint_test_bar_memcmp() 286 memcpy_fromio(read_buf, test->bar[barno] + offset, size); in pci_endpoint_test_bar_memcmp() 304 if (!test->bar[barno]) in pci_endpoint_test_bar() 312 * iterating over the whole BAR size (which might be much larger). in pci_endpoint_test_bar() 338 /* Keep the BAR pattern in the top byte. */ in bar_test_pattern_with_offset() 359 test->bar[barno] + j); in pci_endpoint_test_bars_write_bar() 378 val = readl_relaxed(test->bar[barno] + j); in pci_endpoint_test_bars_read_bar() 381 "BAR%d incorrect data at offset: %#x, got: %#x expected: %#x\n", in pci_endpoint_test_bars_read_bar() 392 enum pci_barno bar; in pci_endpoint_test_bars() local [all …]
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/linux/arch/csky/include/asm/ |
H A D | barrier.h | 13 * bar.brwarws: ordering barrier for all load/store instructions 26 * bar.brw 27 * bar.br 28 * bar.bw 29 * bar.arw 30 * bar.ar 31 * bar.aw 32 * bar.brwarw 33 * bar.brarw 34 * bar.bwarw [all …]
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/linux/samples/rust/ |
H A D | rust_driver_pci.rs | 19 type Bar0 = pci::Bar<{ Regs::END }>; 32 bar: Devres<Bar0>, field 47 fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> { in testdev() 49 bar.write8(index.0, Regs::TEST); in testdev() 51 let offset = u32::from_le(bar.read32(Regs::OFFSET)) as usize; in testdev() 52 let data = bar.read8(Regs::DATA); in testdev() 57 bar.try_write8(data, offset)?; in testdev() 59 Ok(bar.read32(Regs::COUNT)) in testdev() 82 bar <- pdev.iomap_region_sized::<{ Regs::END }>(0, c_str!("rust_driver_pci")), in probe() 89 let bar in probe() 88 let bar = drvdata.bar.access(pdev.as_ref())?; probe() localVariable [all...] |
/linux/drivers/pci/endpoint/functions/ |
H A D | pci-epf-test.c | 720 enum pci_barno bar; in pci_epf_test_enable_doorbell() local 729 bar = pci_epc_get_next_free_bar(epf_test->epc_features, epf_test->test_reg_bar + 1); in pci_epf_test_enable_doorbell() 730 if (bar < BAR_0) in pci_epf_test_enable_doorbell() 743 reg->doorbell_bar = cpu_to_le32(bar); in pci_epf_test_enable_doorbell() 746 ret = pci_epf_align_inbound_addr(epf, bar, ((u64)msg->address_hi << 32) | msg->address_lo, in pci_epf_test_enable_doorbell() 754 epf_test->db_bar.barno = bar; in pci_epf_test_enable_doorbell() 755 epf_test->db_bar.size = epf->bar[bar].size; in pci_epf_test_enable_doorbell() 756 epf_test->db_bar.flags = epf->bar[bar].flags; in pci_epf_test_enable_doorbell() 776 enum pci_barno bar = le32_to_cpu(reg->doorbell_bar); in pci_epf_test_disable_doorbell() local 782 if (bar < BAR_0) in pci_epf_test_disable_doorbell() [all …]
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/linux/arch/arm/mm/ |
H A D | pmsa-v8.c | 141 static int __init __pmsav8_setup_region(unsigned int number, u32 bar, u32 lar) in __pmsav8_setup_region() argument 150 prbar_write(bar); in __pmsav8_setup_region() 153 mpu_rgn_info.rgns[number].prbar = bar; in __pmsav8_setup_region() 163 u32 bar, lar; in pmsav8_setup_ram() local 168 bar = start; in pmsav8_setup_ram() 171 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED; in pmsav8_setup_ram() 174 return __pmsav8_setup_region(number, bar, lar); in pmsav8_setup_ram() 179 u32 bar, lar; in pmsav8_setup_io() local 184 bar = start; in pmsav8_setup_io() 187 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN; in pmsav8_setup_io() [all …]
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