Lines Matching full:bar

215  * @bar: the BAR number corresponding to the register space
220 void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar, in pci_epf_free_space() argument
232 epf_bar = epf->bar; in pci_epf_free_space()
239 dma_free_coherent(dev, epf_bar[bar].aligned_size, addr, in pci_epf_free_space()
240 epf_bar[bar].phys_addr); in pci_epf_free_space()
242 epf_bar[bar].phys_addr = 0; in pci_epf_free_space()
243 epf_bar[bar].addr = NULL; in pci_epf_free_space()
244 epf_bar[bar].size = 0; in pci_epf_free_space()
245 epf_bar[bar].aligned_size = 0; in pci_epf_free_space()
246 epf_bar[bar].barno = 0; in pci_epf_free_space()
247 epf_bar[bar].flags = 0; in pci_epf_free_space()
255 * @bar: the BAR number corresponding to the allocated register space
260 * Flag PCI_BASE_ADDRESS_MEM_TYPE_64 will automatically get set if the BAR
261 * can only be a 64-bit BAR, or if the requested size is larger than 2 GB.
263 void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar, in pci_epf_alloc_space() argument
267 u64 bar_fixed_size = epc_features->bar[bar].fixed_size; in pci_epf_alloc_space()
278 /* According to PCIe base spec, min size for a resizable BAR is 1 MB. */ in pci_epf_alloc_space()
279 if (epc_features->bar[bar].type == BAR_RESIZABLE && size < SZ_1M) in pci_epf_alloc_space()
282 if (epc_features->bar[bar].type == BAR_FIXED && bar_fixed_size) { in pci_epf_alloc_space()
285 "requested BAR size is larger than fixed size\n"); in pci_epf_alloc_space()
290 /* BAR size must be power of two */ in pci_epf_alloc_space()
297 * it might be different if, for example, the fixed size of a BAR in pci_epf_alloc_space()
304 epf_bar = epf->bar; in pci_epf_alloc_space()
317 epf_bar[bar].phys_addr = phys_addr; in pci_epf_alloc_space()
318 epf_bar[bar].addr = space; in pci_epf_alloc_space()
319 epf_bar[bar].size = size; in pci_epf_alloc_space()
320 epf_bar[bar].aligned_size = aligned_size; in pci_epf_alloc_space()
321 epf_bar[bar].barno = bar; in pci_epf_alloc_space()
322 if (upper_32_bits(size) || epc_features->bar[bar].only_64bit) in pci_epf_alloc_space()
323 epf_bar[bar].flags |= PCI_BASE_ADDRESS_MEM_TYPE_64; in pci_epf_alloc_space()
325 epf_bar[bar].flags |= PCI_BASE_ADDRESS_MEM_TYPE_32; in pci_epf_alloc_space()
481 * pci_epf_align_inbound_addr() - Align the given address based on the BAR
485 * @bar: the BAR number corresponding to the given addr
486 * @base: base address matching the @bar alignment requirement
489 * Helper function to align input @addr based on BAR's alignment requirement.
499 int pci_epf_align_inbound_addr(struct pci_epf *epf, enum pci_barno bar, in pci_epf_align_inbound_addr() argument
503 * Most EP controllers require the BAR start address to be aligned to in pci_epf_align_inbound_addr()
504 * the BAR size, because they mask off the lower bits. in pci_epf_align_inbound_addr()
506 * Alignment to BAR size also works for controllers that support in pci_epf_align_inbound_addr()
509 u64 align = epf->bar[bar].size; in pci_epf_align_inbound_addr()