Searched full:axi4 (Results 1 – 15 of 15) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/misc/ |
H A D | xlnx,sd-fec.txt | 15 - "s_axi_aclk", AXI4-Lite memory-mapped slave interface clock (required) 16 - "s_axis_din_aclk", DIN AXI4-Stream Slave interface clock (optional) 17 - "s_axis_din_words-aclk", DIN_WORDS AXI4-Stream Slave interface clock (optional) 18 - "s_axis_ctrl_aclk", Control input AXI4-Stream Slave interface clock (optional) 19 - "m_axis_dout_aclk", DOUT AXI4-Stream Master interface clock (optional) 20 - "m_axis_dout_words_aclk", DOUT_WORDS AXI4-Stream Master interface clock (optional) 21 - "m_axis_status_aclk", Status output AXI4-Stream Master interface clock (optional)
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H A D | xlnx,sd-fec.yaml | 34 - description: AXI4-Lite memory-mapped slave interface clock 35 - description: Control input AXI4-Stream Slave interface clock 36 - description: DIN AXI4-Stream Slave interface clock 37 - description: Status output AXI4-Stream Master interface clock 38 - description: DOUT AXI4-Stream Master interface clock 39 - description: DIN_WORDS AXI4-Stream Slave interface clock 40 - description: DOUT_WORDS AXI4-Stream Master interface clock
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/freebsd/sys/contrib/device-tree/Bindings/dma/xilinx/ |
H A D | xilinx_dma.txt | 6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream 14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
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/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/ |
H A D | xlnx,csi2rxss.yaml | 14 traffic from compliant camera sensors and send the output as AXI4 Stream 19 AXI4 Stream video data.
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H A D | video.txt | 21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
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/freebsd/sys/contrib/device-tree/include/dt-bindings/media/ |
H A D | xilinx-vip.h | 16 * Video format codes as defined in "AXI4-Stream Video IP and System Design
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/freebsd/sys/contrib/device-tree/Bindings/fpga/ |
H A D | xlnx,pr-decoupler.yaml | 24 bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
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H A D | xilinx-pr-decoupler.txt | 15 and AXI4-Lite interfaces on a Reconfigurable Partition when it is
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | allegro,al5e.yaml | 49 - description: AXI4-Lite slave port clock
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/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | xlnx,gpio-xilinx.yaml | 14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | xilinx_axienet.txt | 48 axis_clk: AXI4-Stream clock for TXD RXD TXC and RXS interfaces
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H A D | xlnx,axi-ethernet.yaml | 98 - description: AXI4-Stream clock for TXD RXD TXC and RXS interfaces.
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrInfo.td | 3487 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3496 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3507 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3516 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3527 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3536 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3547 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3556 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
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H A D | ARMInstrFormats.td | 942 class AXI4<dag oops, dag iops, IndexMode im, Format f, InstrItinClass itin,
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/freebsd/share/misc/ |
H A D | pci_vendors | 38824 0000 FU740-C000 RISC-V SoC PCI Express x8 to AXI4 Bridge
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