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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap54xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-output-names = "pad_clks_src_ck";
12 clock-frequency = <12000000>;
16 #clock-cells = <0>;
17 compatible = "ti,gate-clock";
18 clock-output-names = "pad_clks_ck";
20 ti,bit-shift = <8>;
25 #clock-cells = <0>;
[all …]
H A Domap44xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-output-names = "extalt_clkin_ck";
12 clock-frequency = <59000000>;
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
18 clock-output-names = "pad_clks_src_ck";
19 clock-frequency = <12000000>;
23 #clock-cells = <0>;
[all …]
H A Ddra7xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 atl_clkin0_ck: clock-atl-clkin0 {
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
11 clock-output-names = "atl_clkin0_ck";
15 atl_clkin1_ck: clock-atl-clkin1 {
16 #clock-cells = <0>;
17 compatible = "ti,dra7-atl-clock";
18 clock-output-names = "atl_clkin1_ck";
22 atl_clkin2_ck: clock-atl-clkin2 {
[all …]
H A Domap3xxx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <16800000>;
15 #clock-cells = <0>;
16 compatible = "ti,mux-clock";
22 #clock-cells = <0>;
23 compatible = "ti,divider-clock";
25 ti,bit-shift = <6>;
26 ti,max-div = <3>;
[all …]
H A Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <31>;
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
[all …]
H A Dam33xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-22@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <22>;
17 adc_tsc_fck: clock-adc-tsc-fck {
18 #clock-cells = <0>;
19 compatible = "fixed-factor-clock";
20 clock-output-names = "adc_tsc_fck";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/
H A Dbcm2712.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 compatible = "brcm,bcm2712";
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mips/img/
H A Dxilfpga.txt14 the ARTIX-7 FPGA by Xilinx.
18 - microAptiv UP core m14Kc
19 - 50MHz clock speed
20 - 128Mbyte DDR RAM at 0x0000_0000
21 - 8Kbyte RAM at 0x1000_0000
22 - axi_intc at 0x1020_0000
23 - axi_uart16550 at 0x1040_0000
24 - axi_gpio at 0x1060_0000
25 - axi_i2c at 0x10A0_0000
26 - custom_gpio at 0x10C0_0000
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sram/
H A Dsram.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
19 Following the generic-names recommended practice, node names should
27 compatible:
30 - mmio-sram
31 - amlogic,meson-gxbb-sram
32 - arm,juno-sram-ns
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Darm,integrator-ap-lm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/arm,integrator-ap-lm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
15 determine if a logic module is connected at index 0, 1, 2 or 3. The logic
17 then have their own specific per-module bindings and they will be described
21 "#address-cells":
24 "#size-cells":
27 compatible:
[all …]
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/clock/cortina,gemini-clock.h>
8 #include <dt-bindings/reset/cortina,gemini-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 compatible = "simple-bus";
17 interrupt-parent = <&intcon>;
20 compatible = "cortina,gemini-flash", "cfi-flash";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dmpic.txt7 and QorIQ processors and is compatible with the Open PIC. The
14 - compatible
18 controllers compatible with this binding have Block
19 Revision Registers BRR1 and BRR2 at offset 0x0 and
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-exynos5.txt4 at various speeds ranging from 100khz to 3.4Mhz.
7 - compatible: value should be.
8 -> "samsung,exynos5-hsi2c", (DEPRECATED)
9 for i2c compatible with HSI2C available
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
15 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
18 - reg: physical base address of the controller and length of memory mapped
20 - interrupts: interrupt number to the cpu.
21 - #address-cells: always 1 (for i2c addresses)
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8536si-post.dtsi20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
42 /* controller at 0x8000 */
44 compatible = "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
[all …]
H A Dmpc8544si-post.dtsi20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
42 /* controller at 0x8000 */
44 compatible = "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
[all …]
H A Dp1023si-post.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
H A Dmpc8548si-post.dtsi20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
42 /* controller at 0x8000 */
44 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-pm8058.txt3 The Qualcomm PM8058 is a multi-functional device which contains
8 are more of a suggestion than a hard-wired usecase.
10 Hardware-wise the different LEDs support slightly different
16 proper compatible string. For the PM8058 bindings see:
17 mfd/qcom-pm8xxx.txt.
19 Each LED is represented as a sub-node of the syscon device. Each
22 LED sub-node properties:
25 - compatible: one of
26 "qcom,pm8058-led" (for the normal LEDs at 0x131, 0x132 and 0x133)
27 "qcom,pm8058-keypad-led" (for the "keypad" LED at 0x48)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/omap/
H A Domap.txt11 to move data from hwmod to device-tree representation.
15 - compatible: Every devices present in OMAP SoC should be in the
17 - ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP
18 HW documentation, attached to a device. Must contain at least
22 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
24 - ti,no-reset-on-ini
[all...]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dallwinner,sun55i-a523-ccu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun55i-a523-ccu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andre Przywara <andre.przywara@arm.com>
13 "#clock-cells":
16 "#reset-cells":
19 compatible:
21 - allwinner,sun55i-a523-ccu
22 - allwinner,sun55i-a523-r-ccu
[all …]
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dallwinner,sun6i-a31-rtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/allwinner,sun6i-a31-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 compatible:
19 - enum:
20 - allwinner,sun6i-a31-rtc
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/ti/
H A Dti,divider-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock It assumes a register-mapped adjustable clock rate divider
25 ti,index-starts-at-one - valid divisor values start at 1, not the default
32 ti,index-power-of-two - valid divisor values are powers of two. E.g:
49 Any zero value in this array means the corresponding bit-value is invalid
61 - $ref: ti,autoidle.yaml#
[all …]
H A Dti,mux-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,mux-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock assumes a register-mapped multiplexer with multiple inpt clock
30 into the register, instead indexing begins at 1. The optional property
31 "index-starts-at-one" modified the scheme as follows:
44 compatible:
46 - ti,mux-clock
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcpu-capacity.txt6 1 - Introduction
15 2 - CPU capacity definition
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
20 (e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run
23 capture a first-order approximation of the relative performance of CPUs.
29 * A "single-threaded" or CPU affine benchmark
36 CPU capacities are obtained by running the Dhrystone benchmark on each CPU at
38 by the frequency (in MHz) at which the benchmark has been run, so that
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpu/
H A Dcpu-capacity.txt6 1 - Introduction
15 2 - CPU capacity definition
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
20 (e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run
23 capture a first-order approximation of the relative performance of CPUs.
29 * A "single-threaded" or CPU affine benchmark
36 CPU capacities are obtained by running the Dhrystone benchmark on each CPU at
38 by the frequency (in MHz) at which the benchmark has been run, so that
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
[all …]

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