| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | brcm,iproc-clocks.yaml | 15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
32 - brcm,hr2-armpll
33 - brcm,nsp-armpll
76 - brcm,cygnus-armpll
77 - brcm,nsp-armpll
93 - brcm,cygnus-armpll
111 armpll crystal N/A N/A
150 - brcm,hr2-armpll
[all …]
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| H A D | zynq-7000.txt | 41 0: armpll
96 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
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| H A D | keystone-pll.txt | 2 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm-cygnus-clock.dtsi | 45 armpll: armpll@19000000 { label
47 compatible = "brcm,cygnus-armpll";
56 clocks = <&armpll>;
65 clocks = <&armpll>;
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| H A D | bcm63138.dtsi | 56 clocks = <&armpll>;
65 clocks = <&armpll>;
131 armpll: armpll@20000 { label
133 compatible = "brcm,bcm63138-armpll";
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| H A D | bcm5301x.dtsi | 15 compatible = "brcm,nsp-armpll";
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| H A D | bcm-hr2.dtsi | 70 compatible = "brcm,hr2-armpll";
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7622-infracfg.c | 28 "armpll",
30 "armpll"
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| H A D | clk-mt7986-apmixed.c | 43 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, PLL_AO, 32,
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| H A D | clk-mt7629.c | 283 "armpll",
285 "armpll"
313 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0,
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| H A D | clk-mt8516-apmixedsys.c | 60 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
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| H A D | clk-mt7981-apmixed.c | 45 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x00000001, PLL_AO,
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| H A D | clk-mt8167-apmixedsys.c | 59 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
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| H A D | clk-mt7622-apmixedsys.c | 59 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0,
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| H A D | clk-mt2701.c | 124 FACTOR(CLK_TOP_ARMPLL_1P3G, "armpll_1p3g_ck", "armpll", 1, 1),
477 "armpll",
940 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x200, 0x20c, 0x80000000,
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| H A D | clk-mt8365-apmixedsys.c | 83 PLL_B(CLK_APMIXED_ARMPLL, "armpll", 0x030C, 0x0318, 0x00000001, PLL_AO,
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| /linux/drivers/clk/zynq/ |
| H A D | clkc.c | 51 armpll, ddrpll, iopll, enumerator
238 cpu_parents[0] = clk_output_name[armpll]; in zynq_clk_setup()
239 cpu_parents[1] = clk_output_name[armpll]; in zynq_clk_setup()
244 periph_parents[2] = clk_output_name[armpll]; in zynq_clk_setup()
260 clks[armpll] = clk_register_mux(NULL, clk_output_name[armpll], in zynq_clk_setup()
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| /linux/drivers/cpufreq/ |
| H A D | mediatek-cpufreq.c | 205 struct clk *armpll = clk_get_parent(cpu_clk); in mtk_cpufreq_set_target() local
274 ret = clk_set_rate(armpll, freq_hz); in mtk_cpufreq_set_target()
278 clk_set_parent(cpu_clk, armpll); in mtk_cpufreq_set_target()
284 ret = clk_set_parent(cpu_clk, armpll); in mtk_cpufreq_set_target()
302 clk_set_rate(armpll, pre_freq_hz); in mtk_cpufreq_set_target()
303 clk_set_parent(cpu_clk, armpll); in mtk_cpufreq_set_target()
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| /linux/drivers/clk/bcm/ |
| H A D | clk-bcm63xx.c | 12 CLK_OF_DECLARE(bcm63138_armpll, "brcm,bcm63138-armpll", bcm63138_armpll_init);
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| H A D | clk-hr2.c | 17 CLK_OF_DECLARE(hr2_armpll, "brcm,hr2-armpll", hr2_armpll_init);
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| H A D | Makefile | 9 obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
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| H A D | clk-nsp.c | 33 CLK_OF_DECLARE(nsp_armpll, "brcm,nsp-armpll", nsp_armpll_init);
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| H A D | clk-cygnus.c | 45 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8365.dtsi | 164 clock-names = "cpu", "intermediate", "armpll";
184 clock-names = "cpu", "intermediate", "armpll";
204 clock-names = "cpu", "intermediate", "armpll";
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| H A D | mt8516.dtsi | 98 clock-names = "cpu", "intermediate", "armpll";
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