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/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml50 - qcom,qcs615-apss-shared
51 - qcom,sc7180-apss-shared
52 - qcom,sc8180x-apss-shared
53 - qcom,shikra-apss-shared
54 - qcom,sm7150-apss-shared
55 - qcom,sm8150-apss-shared
56 - const: qcom,sdm845-apss-shared
69 - qcom,sdm845-apss-shared
242 - qcom,sdm845-apss-shared
H A Dqcom-ipcc.yaml16 entity on the Application Processor Subsystem (APSS) that wants to listen to
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,ipq5424-apss-clk.yaml4 $id: http://devicetree.org/schemas/clock/qcom,ipq5424-apss-clk.yaml#
7 title: Qualcomm APSS IPQ5424 Clock Controller
19 - qcom,ipq5424-apss-clk
49 compatible = "qcom,ipq5424-apss-clk";
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,mpm.yaml16 monitors the interrupts when the system is asleep, wakes up the APSS when
37 Phandle to the APSS MPM slice of the RPM Message RAM
42 Specify the IRQ used by RPM to wakeup APSS.
/linux/drivers/clk/qcom/
H A Dapss-ipq6018.c15 #include <dt-bindings/clock/qcom,apss-ipq.h>
157 .name = "qcom,apss-ipq6018-clk",
163 MODULE_DESCRIPTION("QCOM APSS IPQ 6018 CLK Driver");
H A Dapss-ipq-pll.c240 .name = "qcom-ipq-apss-pll",
246 MODULE_DESCRIPTION("Qualcomm technology Inc APSS ALPHA PLL Driver");
H A DMakefile60 obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
61 obj-$(CONFIG_IPQ_APSS_5424) += apss-ipq5424.o
62 obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
H A DKconfig476 tristate "IPQ APSS PLL"
478 Support for APSS PLL on ipq devices. The APSS PLL is the main
484 tristate "IPQ5424 APSS Clock Controller"
489 Support for APSS Clock controller on Qualcomm IPQ5424 platform.
494 tristate "IPQ6018 APSS Clock Controller"
501 Support for APSS clock controller on IPQ platforms. The
502 APSS clock controller manages the Mux and enable block that feeds the
H A Dmmcc-sdm660.c93 /* APSS controlled PLLs */
H A Dgcc-msm8976.c4122 /* Enable AUX2 clock for APSS */ in gcc_msm8976_probe()
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpm-master-stats.yaml15 spanning a single subsystem (e.g. APSS, ADSP, CDSP). All of the RPM decisions
65 qcom,master-names = "APSS",
/linux/drivers/mailbox/
H A Dqcom-ipcc.c44 * @base: Base address of the IPCC frame associated to APSS
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi664 compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt";
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.c1485 * That register however is not directly accessible from APSS on A7xx. in a7xx_get_cp_roq_size()
/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp.dtsi6008 compatible = "qcom,apss-wdt-sc8280xp", "qcom,kpss-wdt";
H A Dmonaco.dtsi7405 compatible = "qcom,apss-wdt-qcs8300", "qcom,kpss-wdt";
H A Dglymur.dtsi7702 compatible = "qcom,apss-wdt-glymur", "qcom,kpss-wdt";