| /linux/include/sound/ |
| H A D | ump_msg.h | 1 // SPDX-License-Identifier: GPL-2.0-or-later
27 /* MIDI 1.0 Channel Control (7bit) */
36 UMP_CC_BALANCE = 8,
134 u32 channel:4; member
135 u32 note:8;
136 u32 velocity:8;
138 u32 velocity:8;
139 u32 note:8;
140 u32 channel:4;
153 u32 channel:4; member
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| /linux/drivers/clk/bcm/ |
| H A D | clk-ns2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-ns2.h>
12 #include "clk-iproc.h"
49 .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
52 .mdiv = REG_VAL(0x18, 0, 8),
55 .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
58 .mdiv = REG_VAL(0x18, 8, 8),
61 .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
64 .mdiv = REG_VAL(0x14, 0, 8),
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| H A D | clk-cygnus.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/bcm-cygnus.h>
14 #include "clk-iproc.h"
45 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
63 .channel = BCM_CYGNUS_GENPLL_AXI21_CLK,
66 .mdiv = REG_VAL(0x20, 0, 8),
69 .channel = BCM_CYGNUS_GENPLL_250MHZ_CLK,
72 .mdiv = REG_VAL(0x20, 10, 8),
75 .channel = BCM_CYGNUS_GENPLL_IHOST_SYS_CLK,
[all …]
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| H A D | clk-nsp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include "clk-iproc.h"
33 CLK_OF_DECLARE(nsp_armpll, "brcm,nsp-armpll", nsp_armpll_init);
48 .channel = BCM_NSP_GENPLL_PHY_CLK,
51 .mdiv = REG_VAL(0x18, 16, 8),
54 .channel = BCM_NSP_GENPLL_ENET_SW_CLK,
57 .mdiv = REG_VAL(0x18, 8, 8),
60 .channel = BCM_NSP_GENPLL_USB_PHY_REF_CLK,
[all …]
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| /linux/sound/core/oss/ |
| H A D | linear.c | 2 * Linear conversion Plug-In
4 * Abramo Bagnara <abramo@alsa-project.org>
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
48 memcpy(p + data->copy_ofs, src + data->src_ofs, data->copy_bytes); in do_convert()
49 if (data->cvt_endian) in do_convert()
51 tmp ^= data->flip; in do_convert()
52 memcpy(dst, p + data->dst_ofs, data->dst_bytes); in do_convert()
60 struct linear_priv *data = (struct linear_priv *)plugin->extra_data; in convert()
61 int channel; in convert() local
62 int nchannels = plugin->src_format.channels; in convert()
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| H A D | mulaw.c | 2 * Mu-Law conversion Plug-In Interface
4 * Uros Bizjak <uros@kss-loka.si>
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #define SIGN_BIT (0x80) /* Sign bit for a u-law byte. */
31 #define NSEGS (8) /* Number of u-law segments. */
55 * linear2ulaw() - Convert a linear PCM value to u-law
58 * is biased by adding 33 which shifts the encoding range from (0 - 8158) to
59 * (33 - 8191). The result can be seen in the following encoding table:
62 * ------------------------ ---------------
75 * four bits wxyz. * The trailing bits (a - h) are ignored.
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| /linux/sound/soc/sprd/ |
| H A D | sprd-mcdt.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include "sprd-mcdt.h"
57 /* Channel water mark definition */
60 #define MCDT_CH_FIFO_AF_MASK GENMASK(8, 0)
62 /* DMA channel select definition */
67 #define MCDT_DMA_CH2_SEL_MASK GENMASK(11, 8)
68 #define MCDT_DMA_CH2_SEL_SHIFT 8
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
121 u32 orig = readl_relaxed(mcdt->base + reg); in sprd_mcdt_update()
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| /linux/drivers/hsi/controllers/ |
| H A D | omap_ssi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define SSI_MPU_ENABLE_REG(port, irq) (0x80c + ((port) * 0x10) + ((irq) * 8))
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
57 #define SSI_SST_FRAMESIZE_REG 8
62 # define SSI_FULL(channel) (1 << (channel)) argument
71 #define SSI_SST_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
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| /linux/Documentation/ABI/testing/ |
| H A D | configfs-most | 2 Date: March 8, 2019
9 # mount -t configfs none /sys/kernel/config/
13 Date: March 8, 2019
19 configure the buffer size for this channel
22 configure the sub-buffer size for this channel
28 channel
32 this channel
51 channel
52 name of the channel the link is to be attached to
60 configuration, the creation is post-poned until
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| /linux/drivers/net/ethernet/microchip/ |
| H A D | lan743x_main.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
33 #define FPGA_REV_GET_MINOR_(fpga_rev) (((fpga_rev) >> 8) & 0x000000FF)
65 #define PMT_CTL_RES_CLR_WKP_MASK_ GENMASK(9, 8)
132 #define HS_E2P_CFG_I2C_BAUD_RATE_MASK_ GENMASK(9, 8)
152 #define FCT_RX_CTL_EN_(channel) BIT(28 + (channel)) argument
153 #define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel)) argument
154 #define FCT_RX_CTL_RESET_(channel) BIT(20 + (channel)) argument
157 #define FCT_TX_CTL_EN_(channel) BIT(28 + (channel)) argument
158 #define FCT_TX_CTL_DIS_(channel) BIT(24 + (channel)) argument
159 #define FCT_TX_CTL_RESET_(channel) BIT(20 + (channel)) argument
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
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| H A D | st,sta32x.txt | 7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
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| /linux/sound/usb/caiaq/ |
| H A D | control.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
24 struct snd_usb_caiaqdev *cdev = caiaqdev(chip->card); in control_info()
25 int pos = kcontrol->private_value; in control_info()
29 uinfo->count = 1; in control_info()
32 switch (cdev->chip.usb_id) { in control_info()
37 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
38 uinfo->value.integer.min = 0; in control_info()
39 uinfo->value.integer.max = 2; in control_info()
54 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
55 uinfo->value.integer.min = 0; in control_info()
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| /linux/drivers/net/wireless/broadcom/brcm80211/include/ |
| H A D | brcmu_d11.h | 1 // SPDX-License-Identifier: ISC
13 /* A chanspec (channel specification) holds the channel number, band,
20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
30 /* bit 8~16 for dot 11n IO types
31 * bit 8~9 sideband
37 #define BRCMU_CHSPEC_D11N_SB_SHIFT 8
51 /* bit 8~16 for dot 11ac IO types
52 * bit 8~10 sideband
57 #define BRCMU_CHSPEC_D11AC_SB_SHIFT 8
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| /linux/sound/pci/emu10k1/ |
| H A D | p16v.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8 * Output fixed at S32_LE, 2 channel to hw:0,0
15 * Use 2 channel output streams instead of 8 channel
240 int channel = substream->pcm->device - emu->p16v_device_offset; snd_p16v_pcm_prepare_playback() local
307 int channel = substream->pcm->device - emu->p16v_device_offset; snd_p16v_pcm_prepare_capture() local
407 int channel; snd_p16v_pcm_trigger_playback() local
459 int channel = 0; snd_p16v_pcm_trigger_capture() local
489 int channel = substream->pcm->device - emu->p16v_device_offset; snd_p16v_pcm_pointer_playback() local
514 int channel = 0; snd_p16v_pcm_pointer_capture() local
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| /linux/sound/pci/ca0106/ |
| H A D | ca0106.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
18 * 0.0.8
34 * playback periods_min=2, periods_max=8
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
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| /linux/arch/mips/include/asm/ |
| H A D | jazzdma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support
17 extern void vdma_enable(int channel);
18 extern void vdma_disable(int channel);
19 extern void vdma_set_mode(int channel, int mode);
20 extern void vdma_set_addr(int channel, long addr);
21 extern void vdma_set_count(int channel, int count);
22 extern int vdma_get_residue(int channel);
23 extern int vdma_get_enable(int channel);
38 #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1))
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| /linux/Documentation/leds/ |
| H A D | leds-lp5523.rst | 9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
12 -----------
15 The name of each channel is configurable in the platform data - name and label.
16 There are three options to make the channel name.
20 To make specific channel name, then use 'name' platform data.
22 - /sys/class/leds/R1 (name: 'R1')
23 - /sys/class/leds/B1 (name: 'B1')
27 For one device name with channel number, then use 'label'.
28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8)
33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8)
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
20 It features up to 8 serial digital interfaces (SPI or Manchester) and
[all …]
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
19 output 4 and 8 bits each (x4, x8). Grouping several of these in parallel
21 typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
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| /linux/drivers/tty/serial/ |
| H A D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
47 #define R8 8
98 #define Rx8 0xc0 /* Rx 8 Bits/Character */
111 #define MONSYNC 0 /* 8 Bit Sync character */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
132 #define Tx8 0x60 /* Tx 8 bits/character */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
140 /* Write Register 8 (transmit buffer) */
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| /linux/sound/soc/codecs/ |
| H A D | tas5086.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
70 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
88 * Default TAS5086 power-up configuration
172 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
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| /linux/drivers/media/pci/tw5864/ |
| H A D | tw5864-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
52 * [15:0] Two bit for each channel (channel 0 ~ 7). Each two bits are the buffer
53 * pointer for the last encoded frame of the corresponding channel.
76 * 0->3 4 VLC data buffer in DDR (1M each)
77 * 0->7 8 VLC data buffer in DDR (512k each)
91 #define TW5864_VLC_VLD BIT(8)
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| /linux/drivers/comedi/drivers/ |
| H A D | plx9080.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
29 * @transfer_size: Transfer size in bytes (max 8 MiB) (DMASIZ).
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
33 * PCI 9080. All members are raw, little-endian register values that
35 * corresponding registers for the DMA channel.
37 * The DMA descriptors must be aligned on a 16-byte boundary. Bits 3:0
90 #define PLX_MARBR_PT(x) (BIT(8) * ((x) & 0xff))
91 #define PLX_MARBR_PT_MASK GENMASK(15, 8)
92 #define PLX_MARBR_TO_PT(r) (((r) & PLX_MARBR_PT_MASK) >> 8)
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| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-ampere-mtjade.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
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