| /linux/drivers/staging/media/ipu3/ |
| H A D | ipu3-tables.c | 1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
10 /* Scale factor 32 / (32 + 0) = 1 */
22 /* Scale factor 32 / (32 + 1) = 0.969697 */
24 .even = { { 0, 3, 122, 7, 3, 0, 0 },
25 { 0, 0, 122, 7, 7, -1, 0 },
26 { 0, -3, 122, 7, 10, -1, 0 },
27 { 0, -5, 121, 7, 14, -2, 0 },
28 { 0, -7, 120, 7, 18, -3, 0 },
29 { 0, -9, 118, 7, 23, -4, 0 },
[all …]
|
| /linux/sound/soc/codecs/ |
| H A D | wm2200.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * wm2200.h - WM2200 audio codec interface
12 #define WM2200_CLK_SYSCLK 1
15 #define WM2200_CLKSRC_MCLK2 1
20 #define WM2200_FLL_SRC_MCLK2 1
529 * R0 (0x00) - software reset
531 #define WM2200_SW_RESET_CHIP_ID1_MASK 0xFFFF /* SW_RESET_CHIP_ID1 - [15:0] */
532 #define WM2200_SW_RESET_CHIP_ID1_SHIFT 0 /* SW_RESET_CHIP_ID1 - [15:0] */
533 #define WM2200_SW_RESET_CHIP_ID1_WIDTH 16 /* SW_RESET_CHIP_ID1 - [15:0] */
536 * R1 (0x01) - Device Revision
[all …]
|
| /linux/drivers/pinctrl/sunplus/ |
| H A D | sppctl_sp7021.c | 1 // SPDX-License-Identifier: GPL-2.0
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
19 D_PIS(0, 4), D_PIS(0, 5), D_PIS(0, 6), D_PIS(0, 7),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
21 D_PIS(1, 4), D_PIS(1, 5), D_PIS(1, 6), D_PIS(1, 7),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
23 D_PIS(2, 4), D_PIS(2, 5), D_PIS(2, 6), D_PIS(2, 7),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
[all …]
|
| /linux/arch/sh/include/mach-common/mach/ |
| H A D | sh2007.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define BUS_SZ8 1
13 #define PCMCIA_IODYN 1
20 #define PCMCIA_ATTR16 7
25 /* write-read/write-write delay (0-7:0,1,2,3,4,5,6,7) */
28 /* different area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
31 /* same area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
34 /* different area, read-read delay (0-7:0,1,2,3,4,5,6,7) */
37 /* same area, read-read delay (0-7:0,1,2,3,4,5,6,7) */
40 /* burst count (0-3:4,8,16,32) */
[all …]
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | pixfmt-srggb10-ipu3.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
[all …]
|
| H A D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
[all …]
|
| H A D | pixfmt-packed-yuv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-yuv:
15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
16 - 'Y', 'Cb' and 'Cr' denote bits of the luma, blue chroma (also known as
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
33 Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
34 [Cb\ :sub:`2-0` Cr\ :sub:`4-0`] followed by [Y'\ :sub:`4-0` Cb\ :sub:`5-3`].
44 .. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
45 :header-rows: 2
[all …]
|
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_qp_tables.c | 1 // SPDX-License-Identifier: MIT
41 { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
48 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
50 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 },
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
52 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 },
[all …]
|
| /linux/arch/powerpc/crypto/ |
| H A D | curve25519-ppc64le_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # This code is taken from CRYPTOGAMs[1] and is included here using the option
9 # [1] https://github.com/dot-asm/cryptogams/
11 # Copyright (c) 2006-2017, CRYPTOGAMS by <appro@openssl.org>
58 # - Added x25519_fe51_sqr_times, x25519_fe51_frombytes, x25519_fe51_tobytes
61 # Copyright 2024- IBM Corp.
63 # X25519 lower-level primitives for PPC64.
73 stdu 1,-144(1)
74 std 21,56(1)
75 std 22,64(1)
[all …]
|
| /linux/tools/arch/x86/kcpuid/ |
| H A D | cpuid.csv | 1 # SPDX-License-Identifier: CC0-1.0
2 # Generator: x86-cpuid-db v1.0
5 # Auto-generated file.
6 # Please submit all updates and bugfixes to https://x86-cpuid.org
16 0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3
17 0, 0, ecx, 31:0, cpu_vendorid_2 , CPU vendor ID string bytes 8 - 11
18 0, 0, edx, 31:0, cpu_vendorid_1 , CPU vendor ID string bytes 4 - 7
20 # Leaf 1H
23 1, 0, eax, 3:0, stepping , Stepping ID
24 1, 0, eax, 7:4, base_model , Base CPU model ID
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
25 "Counter": "0,1,2,3,4,5,6,7",
26 "CounterMask": "1",
35 "Counter": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3,4,5,6,7",
54 "Counter": "0,1,2,3,4,5,6,7",
[all …]
|
| /linux/lib/ |
| H A D | test_objagg.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
21 WARN_ON(1); in key_id_index()
60 if (!world->key_refs[key_id_index(key_id)]) { in world_obj_get()
61 world->objagg_objs[key_id_index(key_id)] = objagg_obj; in world_obj_get()
62 } else if (world->objagg_objs[key_id_index(key_id)] != objagg_obj) { in world_obj_get()
65 err = -EINVAL; in world_obj_get()
68 world->key_refs[key_id_index(key_id)]++; in world_obj_get()
81 if (!world->key_refs[key_id_index(key_id)]) in world_obj_put()
83 objagg_obj = world->objagg_objs[key_id_index(key_id)]; in world_obj_put()
85 world->key_refs[key_id_index(key_id)]--; in world_obj_put()
[all …]
|
| /linux/drivers/video/fbdev/via/ |
| H A D | hw.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
32 #define VIA_STATE_STANDBY 1
43 #define IGA2_HOR_TOTAL_SHADOW_FORMULA(x) ((x/8)-5)
44 #define IGA2_HOR_BLANK_END_SHADOW_FORMULA(x, y) (((x+y)/8)-1)
45 #define IGA2_VER_TOTAL_SHADOW_FORMULA(x) ((x)-2)
46 #define IGA2_VER_ADDR_SHADOW_FORMULA(x) ((x)-1)
47 #define IGA2_VER_BLANK_START_SHADOW_FORMULA(x) ((x)-1)
48 #define IGA2_VER_BLANK_END_SHADOW_FORMULA(x, y) ((x+y)-1)
[all …]
|
| /linux/Documentation/input/devices/ |
| H A D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
18 4. Hardware version 1
25 5.2.1 Parity checking and packet re-synchronization
31 6.2.1 One/Three finger touch
33 7. Hardware version 4
36 7.2.1 Status packet
42 8.2.1 Status Packet
50 hardware versions unimaginatively called version 1,version 2, version 3
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
23 "Counter": "0,1,2,3,4,5,6,7",
32 "Counter": "0,1,2,3,4,5,6,7",
35 "PEBS": "1",
41 "Counter": "0,1,2,3,4,5,6,7",
44 "PEBS": "1",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
6 "Deprecated": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
24 "Counter": "0,1,2,3,4,5,6,7",
25 "CounterMask": "1",
26 "Deprecated": "1",
34 "Counter": "0,1,2,3,4,5,6,7",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
6 "Deprecated": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
24 "Counter": "0,1,2,3,4,5,6,7",
25 "CounterMask": "1",
26 "Deprecated": "1",
34 "Counter": "0,1,2,3,4,5,6,7",
[all …]
|
| /linux/drivers/pinctrl/tegra/ |
| H A D | pinctrl-tegra234.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
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| /linux/arch/m68k/fpsp040/ |
| H A D | tbldo.S | 10 | index with a 10-bit index, with the first
11 | 7 bits the opcode, and the remaining 3
23 |TBLDO idnt 2,1 | Motorola 040 Floating Point Software Package
46 | instruction ;opcode-stag Notes
49 .long smovcr |$00-0 fmovecr all
50 .long smovcr |$00-1 fmovecr all
51 .long smovcr |$00-2 fmovecr all
52 .long smovcr |$00-3 fmovecr all
53 .long smovcr |$00-4 fmovecr all
54 .long smovcr |$00-5 fmovecr all
[all …]
|
| /linux/drivers/gpu/drm/omapdrm/dss/ |
| H A D | hdmi5_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
28 void __iomem *base = core->base; in hdmi5_core_ddc_init()
45 0, 0, 1) != 1) in hdmi5_core_ddc_init()
48 /* Standard (0) or Fast (1) Mode */ in hdmi5_core_ddc_init()
54 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
56 v & 0xff, 7, 0); in hdmi5_core_ddc_init()
61 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
63 v & 0xff, 7, 0); in hdmi5_core_ddc_init()
68 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
[all …]
|
| /linux/Documentation/hwmon/ |
| H A D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
114 either 1 degC or 0.5 degC, depending on the temperature source and
121 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
138 The mode works for fan1-fan5.
141 ----------------
143 pwm[1-7]
144 - this file stores PWM duty cycle or DC value (fan speed) in range:
[all …]
|
| /linux/arch/alpha/include/asm/ |
| H A D | xor.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-alpha/xor.h
5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6
56 ldq $1,0($18) \n\
63 ldq $7,24($18) \n\
73 xor $0,$1,$0 # 7 cycles from $1 load \n\
81 xor $6,$7,$6 \n\
93 subq $16,1,$16 \n\
111 ldq $1,0($18) \n\
117 ldq $7,16($18) \n\
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sierraforest/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
13 "Counter": "0,1,2,3,4,5,6,7",
21 "Counter": "0,1,2,3,4,5,6,7",
29 "Counter": "0,1,2,3,4,5,6,7",
37 "Counter": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3,4,5,6,7",
53 "Counter": "0,1,2,3,4,5,6,7",
61 "Counter": "0,1,2,3,4,5,6,7",
62 "Deprecated": "1",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/grandridge/ |
| H A D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
13 "Counter": "0,1,2,3,4,5,6,7",
21 "Counter": "0,1,2,3,4,5,6,7",
29 "Counter": "0,1,2,3,4,5,6,7",
37 "Counter": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3,4,5,6,7",
53 "Counter": "0,1,2,3,4,5,6,7",
61 "Counter": "0,1,2,3,4,5,6,7",
62 "Deprecated": "1",
[all …]
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8173-pinfunc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <dt-bindings/pinctrl/mt65xx.h>
13 #define MT8173_PIN_0_EINT0__FUNC_IRDA_PDN (MTK_PIN_NO(0) | 1)
17 #define MT8173_PIN_0_EINT0__FUNC_DBG_MON_A_20_ (MTK_PIN_NO(0) | 7)
19 #define MT8173_PIN_1_EINT1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)
20 #define MT8173_PIN_1_EINT1__FUNC_IRDA_RXD (MTK_PIN_NO(1) | 1)
21 #define MT8173_PIN_1_EINT1__FUNC_I2S1_BCK (MTK_PIN_NO(1) | 2)
22 #define MT8173_PIN_1_EINT1__FUNC_SDA5 (MTK_PIN_NO(1) | 3)
23 #define MT8173_PIN_1_EINT1__FUNC_URXD0 (MTK_PIN_NO(1) | 4)
24 #define MT8173_PIN_1_EINT1__FUNC_DBG_MON_A_21_ (MTK_PIN_NO(1) | 7)
[all …]
|